Convert CONFIG_BOARD_EARLY_INIT_F to Kconfig
[platform/kernel/u-boot.git] / include / configs / ls1046a_common.h
index 9ee29b4..965d6c9 100644 (file)
@@ -9,16 +9,10 @@
 
 #define CONFIG_REMAKE_ELF
 #define CONFIG_FSL_LAYERSCAPE
-#define CONFIG_FSL_LSCH2
-#define CONFIG_LS1046A
 #define CONFIG_MP
-#define CONFIG_SYS_FSL_CLK
 #define CONFIG_GICV2
 
 #include <asm/arch/config.h>
-#ifdef CONFIG_SYS_FSL_SRDS_1
-#define        CONFIG_SYS_HAS_SERDES
-#endif
 
 /* Link Definitions */
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
@@ -26,7 +20,6 @@
 #define CONFIG_SUPPORT_RAW_INITRD
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_BOARD_EARLY_INIT_F      1
 
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000
@@ -46,7 +39,7 @@
 #define CONFIG_CONS_INDEX              1
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    1
-#define CONFIG_SYS_NS16550_CLK         (get_bus_freq(0)/2)
+#define CONFIG_SYS_NS16550_CLK          (get_serial_clock())
 
 #define CONFIG_BAUDRATE                        115200
 #define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
@@ -66,8 +59,6 @@
 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
 
 #define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR                0x110
-#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS             0x500
 #define CONFIG_SPL_TEXT_BASE           0x10000000
 #define CONFIG_SPL_MAX_SIZE            0x1f000         /* 124 KiB */
 #define CONFIG_SPL_STACK               0x10020000
 #define CONFIG_SYS_MONITOR_LEN         0xa0000
 #endif
 
+/* NAND SPL */
+#ifdef CONFIG_NAND_BOOT
+#define CONFIG_SPL_PBL_PAD
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_LDSCRIPT            "arch/arm/cpu/armv8/u-boot-spl.lds"
+#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_WATCHDOG_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
+#define CONFIG_SPL_TEXT_BASE           0x10000000
+#define CONFIG_SPL_MAX_SIZE            0x1d000         /* 116 KiB */
+#define CONFIG_SPL_STACK               0x1001f000
+#define CONFIG_SYS_NAND_U_BOOT_DST     CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
+
+#define CONFIG_SPL_BSS_START_ADDR      0x8f000000
+#define CONFIG_SPL_BSS_MAX_SIZE                0x80000
+#define CONFIG_SYS_SPL_MALLOC_START    (CONFIG_SPL_BSS_START_ADDR + \
+                                       CONFIG_SPL_BSS_MAX_SIZE)
+#define CONFIG_SYS_SPL_MALLOC_SIZE     0x100000
+#define CONFIG_SYS_MONITOR_LEN         0xa0000
+#endif
+
 /* I2C */
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_CMD_ENV
 
 /* MMC */
-#define CONFIG_MMC
 #ifdef CONFIG_MMC
 #define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
 #define CONFIG_SYS_FMAN_FW_ADDR                (512 * 0x820)
-#else
+#elif defined(CONFIG_QSPI_BOOT)
 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
 #define CONFIG_SYS_FMAN_FW_ADDR                0x40300000
 #define CONFIG_ENV_SPI_BUS             0
 #define CONFIG_ENV_SPI_CS              0
 #define CONFIG_ENV_SPI_MAX_HZ          1000000
 #define CONFIG_ENV_SPI_MODE            0x03
+#elif defined(CONFIG_NAND_BOOT)
+#define CONFIG_SYS_QE_FMAN_FW_IN_NAND
+#define CONFIG_SYS_FMAN_FW_ADDR                (6 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#else
+#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
+#define CONFIG_SYS_FMAN_FW_ADDR                0x60300000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH   0x10000
 #define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_LOAD_ADDR   (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
-#define CONFIG_ARCH_EARLY_INIT_R
-#define CONFIG_BOARD_LATE_INIT
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE           128