Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

[platform/kernel/u-boot.git] / include / configs / ls1046a_common.h

diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 3944f87..24db23b 100644 (file)
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -16,6 +16,7 @@
 #define SPL_NO_QSPI
 #define SPL_NO_USB
 #define SPL_NO_SATA
+#undef CONFIG_DM_I2C
 #endif
 #if defined(CONFIG_SPL_BUILD) && \
        (defined(CONFIG_NAND_BOOT) || defined(CONFIG_QSPI_BOOT))
@@ -126,7 +127,17 @@
 #endif
 
 /* I2C */
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
+#define CONFIG_SYS_I2C_MXC_I2C4                /* enable I2C bus 4 */
+#else
+#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
+#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
+#endif
 
 /* PCIe */
 #define CONFIG_PCIE1           /* PCIE controller 1 */
@@ -206,6 +217,10 @@
 #define LS1046A_BOOT_SRC_AND_HDR\
        "boot_scripts=ls1046afrwy_boot.scr\0"   \
        "boot_script_hdr=hdr_ls1046afrwy_bs.out\0"
+#elif defined(CONFIG_TARGET_LS1046AQDS)
+#define LS1046A_BOOT_SRC_AND_HDR\
+       "boot_scripts=ls1046aqds_boot.scr\0"    \
+       "boot_script_hdr=hdr_ls1046aqds_bs.out\0"
 #else
 #define LS1046A_BOOT_SRC_AND_HDR\
        "boot_scripts=ls1046ardb_boot.scr\0"    \
@@ -217,10 +232,9 @@
        "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
        "ramdisk_addr=0x800000\0"               \
        "ramdisk_size=0x2000000\0"              \
-       "fdt_high=0xffffffffffffffff\0"         \
-       "initrd_high=0xffffffffffffffff\0"      \
+       "bootm_size=0x10000000\0"               \
        "fdt_addr=0x64f00000\0"                 \
-       "kernel_addr=0x65000000\0"              \
+       "kernel_addr=0x61000000\0"              \
        "scriptaddr=0x80000000\0"               \
        "scripthdraddr=0x80080000\0"            \
        "fdtheader_addr_r=0x80100000\0"         \
@@ -267,6 +281,18 @@
                "&& sf read $kernelheader_addr_r $kernelheader_start "  \
                "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
                "bootm $load_addr#$board\0"             \
+       "nand_bootcmd=echo Trying load from nand..;"      \
+               "nand info; nand read $load_addr "         \
+               "$kernel_start $kernel_size; env exists secureboot "    \
+               "&& nand read $kernelheader_addr_r $kernelheader_start " \
+               "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
+               "bootm $load_addr#$board\0"             \
+       "nor_bootcmd=echo Trying load from nor..;"      \
+               "cp.b $kernel_addr $load_addr "         \
+               "$kernel_size; env exists secureboot "  \
+               "&& cp.b $kernelheader_addr $kernelheader_addr_r "      \
+               "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
+               "bootm $load_addr#$board\0"     \
        "sd_bootcmd=echo Trying load from SD ..;"       \
                "mmcinfo; mmc read $load_addr "         \
                "$kernel_addr_sd $kernel_size_sd && "   \