arm: stm32: Disable ATAGs support
[platform/kernel/u-boot.git] / include / configs / ls1043ardb.h
index 54e6eef..84b83e6 100644 (file)
@@ -21,8 +21,6 @@
 
 #ifndef CONFIG_SPL
 #define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_FSL_DDR_INTERACTIVE     /* Interactive debugging */
-#define CONFIG_FSL_DDR_BIST
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
 #endif
@@ -37,7 +35,6 @@
 
 #ifdef CONFIG_SD_BOOT
 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg
-#define CONFIG_CMD_SPL
 #define CONFIG_SYS_SPL_ARGS_ADDR       0x90000000
 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR        0x10000
 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR  0x500
 #define CONFIG_SYS_CPLD_FTIM3          0x0
 
 /* IFC Timing Params */
+#ifdef CONFIG_TFABOOT
+#define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR_CSPR_EXT
+#define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR_CSPR
+#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+
+#define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_NAND_CSPR_EXT
+#define CONFIG_SYS_CSPR1               CONFIG_SYS_NAND_CSPR
+#define CONFIG_SYS_AMASK1              CONFIG_SYS_NAND_AMASK
+#define CONFIG_SYS_CSOR1               CONFIG_SYS_NAND_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NAND_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NAND_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NAND_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NAND_FTIM3
+#else
 #ifdef CONFIG_NAND_BOOT
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NAND_CSPR
 #define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NAND_FTIM2
 #define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NAND_FTIM3
 #endif
+#endif
 
 #define CONFIG_SYS_CSPR2_EXT           CONFIG_SYS_CPLD_CSPR_EXT
 #define CONFIG_SYS_CSPR2               CONFIG_SYS_CPLD_CSPR
 /*
  * Environment
  */
-#ifndef SPL_NO_ENV
-#define CONFIG_ENV_OVERWRITE
-#endif
-
-#if defined(CONFIG_NAND_BOOT)
-#define CONFIG_ENV_SIZE                        0x2000
-#define CONFIG_ENV_OFFSET              (24 * CONFIG_SYS_NAND_BLOCK_SIZE)
-#elif defined(CONFIG_SD_BOOT)
-#define CONFIG_ENV_OFFSET              (3 * 1024 * 1024)
-#define CONFIG_SYS_MMC_ENV_DEV         0
-#define CONFIG_ENV_SIZE                        0x2000
-#else
-#define CONFIG_ENV_ADDR                        (CONFIG_SYS_FLASH_BASE + 0x300000)
-#define CONFIG_ENV_SECT_SIZE           0x20000
-#define CONFIG_ENV_SIZE                        0x20000
-#endif
 
 /* FMan */
 #ifndef SPL_NO_FMAN
 #define AQR105_IRQ_MASK                        0x40000000
 
-#ifdef CONFIG_NET
-#define CONFIG_PHY_VITESSE
-#define CONFIG_PHY_REALTEK
-#endif
-
 #ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_FMAN_ENET
-
 #define RGMII_PHY1_ADDR                        0x1
 #define RGMII_PHY2_ADDR                        0x2
 
 
 /* SATA */
 #ifndef SPL_NO_SATA
-#ifndef CONFIG_CMD_EXT2
-#define CONFIG_CMD_EXT2
-#endif
 #define CONFIG_SYS_SCSI_MAX_SCSI_ID            2
 #define CONFIG_SYS_SCSI_MAX_LUN                        2
 #define CONFIG_SYS_SCSI_MAX_DEVICE             (CONFIG_SYS_SCSI_MAX_SCSI_ID * \