Merge branch 'master' of git://git.denx.de/u-boot-tegra

[platform/kernel/u-boot.git] / include / configs / ls1043ardb.h

diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index 8ac752e..506f50d 100644 (file)
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -12,7 +12,7 @@
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
-#if defined(CONFIG_NAND_BOOT)
+#if defined(CONFIG_NAND_BOOT) || defined(CONFIG_SD_BOOT)
 #define CONFIG_SYS_TEXT_BASE           0x82000000
 #else
 #define CONFIG_SYS_TEXT_BASE           0x60100000
@@ -27,7 +27,7 @@
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 /* Physical Memory Map */
 #define CONFIG_CHIP_SELECTS_PER_CTRL   4
-#define CONFIG_NR_DRAM_BANKS           1
+#define CONFIG_NR_DRAM_BANKS           2
 
 #define CONFIG_SYS_SPD_BUS_NUM         0
 
@@ -45,6 +45,10 @@
 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043ardb/ls1043ardb_rcw_nand.cfg
 #endif
 
+#ifdef CONFIG_SD_BOOT
+#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg
+#endif
+
 /*
  * NOR Flash Definitions
  */
@@ -227,6 +231,11 @@
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_SIZE                        0x2000
 #define CONFIG_ENV_OFFSET              (10 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#elif defined(CONFIG_SD_BOOT)
+#define CONFIG_ENV_OFFSET              (1024 * 1024)
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV         0
+#define CONFIG_ENV_SIZE                        0x2000
 #else
 #define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_ADDR                        (CONFIG_SYS_FLASH_BASE + 0x200000)
@@ -234,4 +243,44 @@
 #define CONFIG_ENV_SIZE                        0x20000
 #endif
 
+/* FMan */
+#ifdef CONFIG_SYS_DPAA_FMAN
+#define CONFIG_FMAN_ENET
+#define CONFIG_CMD_MII
+#define CONFIG_PHYLIB
+#define CONFIG_PHYLIB_10G
+#define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
+
+#define CONFIG_PHY_VITESSE
+#define CONFIG_PHY_REALTEK
+#define CONFIG_PHY_AQUANTIA
+
+#define RGMII_PHY1_ADDR                        0x1
+#define RGMII_PHY2_ADDR                        0x2
+
+#define QSGMII_PORT1_PHY_ADDR          0x4
+#define QSGMII_PORT2_PHY_ADDR          0x5
+#define QSGMII_PORT3_PHY_ADDR          0x6
+#define QSGMII_PORT4_PHY_ADDR          0x7
+
+#define FM1_10GEC1_PHY_ADDR            0x1
+
+#define CONFIG_ETHPRIME                        "FM1@DTSEC3"
+#endif
+
+/* USB */
+#define CONFIG_HAS_FSL_XHCI_USB
+#ifdef CONFIG_HAS_FSL_XHCI_USB
+#define CONFIG_USB_XHCI
+#define CONFIG_USB_XHCI_FSL
+#define CONFIG_USB_XHCI_DWC3
+#define CONFIG_USB_MAX_CONTROLLER_COUNT                3
+#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS     2
+#define CONFIG_CMD_USB
+#define CONFIG_USB_STORAGE
+#define CONFIG_CMD_EXT2
+#endif
+
+#include <asm/fsl_secure_boot.h>
+
 #endif /* __LS1043ARDB_H__ */