Convert CONFIG_SYS_FLASH_ERASE_TOUT et al to Kconfig

[platform/kernel/u-boot.git] / include / configs / ls1043aqds.h

diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index 94a6609..e265b1a 100644 (file)
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -8,29 +8,11 @@
 
 #include "ls1043a_common.h"
 
-#ifndef __ASSEMBLY__
-unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
-#endif
-
-#define CONFIG_SYS_CLK_FREQ            get_board_sys_clk()
-#define CONFIG_DDR_CLK_FREQ            get_board_ddr_clk()
-
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
-#define CONFIG_LAYERSCAPE_NS_ACCESS
-
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
 /* Physical Memory Map */
-#define CONFIG_CHIP_SELECTS_PER_CTRL   4
 
-#define CONFIG_DDR_SPD
 #define SPD_EEPROM_ADDRESS             0x51
-#define CONFIG_SYS_SPD_BUS_NUM         0
 
-#define CONFIG_DDR_ECC
 #ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
 #endif
 
@@ -53,46 +35,14 @@ unsigned long get_board_ddr_clk(void);
 #define QSGMII_CARD_PORT4_PHY_ADDR_S2 0xB
 #endif
 
-#ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1043aqds/ls1043aqds_pbi.cfg
-#endif
-
-#ifdef CONFIG_NAND_BOOT
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043aqds/ls1043aqds_rcw_nand.cfg
-#endif
-
-#ifdef CONFIG_SD_BOOT
-#ifdef CONFIG_SD_BOOT_QSPI
-#define CONFIG_SYS_FSL_PBL_RCW \
-       board/freescale/ls1043aqds/ls1043aqds_rcw_sd_qspi.cfg
-#else
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043aqds/ls1043aqds_rcw_sd_ifc.cfg
-#endif
-#endif
-
-/* LPUART */
-#ifdef CONFIG_LPUART
-#define CONFIG_LPUART_32B_REG
-#endif
-
 /* SATA */
-#define CONFIG_SCSI_AHCI_PLAT
 
 /* EEPROM */
 #define CONFIG_SYS_I2C_EEPROM_NXID
 #define CONFIG_SYS_EEPROM_BUS_NUM              0
-#define CONFIG_SYS_I2C_EEPROM_ADDR             0x57
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN         1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS      3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  5
 
 #define CONFIG_SYS_SATA                                AHCI_BASE_ADDR
 
-#define CONFIG_SYS_SCSI_MAX_SCSI_ID            1
-#define CONFIG_SYS_SCSI_MAX_LUN                        1
-#define CONFIG_SYS_SCSI_MAX_DEVICE             (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
-                                               CONFIG_SYS_SCSI_MAX_LUN)
-
 /*
  * IFC Definitions
  */
@@ -124,22 +74,16 @@ unsigned long get_board_ddr_clk(void);
                                        FTIM2_NOR_TWP(0x1c))
 #define CONFIG_SYS_NOR_FTIM3           0
 
-#define CONFIG_SYS_MAX_FLASH_BANKS     1       /* number of banks */
 #define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
 
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS, \
                                        CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000}
 
-#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
 #define CONFIG_SYS_WRITE_SWAPPED_DATA
 
 /*
  * NAND Flash Definitions
  */
-#define CONFIG_NAND_FSL_IFC
 
 #define CONFIG_SYS_NAND_BASE           0x7e800000
 #define CONFIG_SYS_NAND_BASE_PHYS      CONFIG_SYS_NAND_BASE
@@ -159,8 +103,6 @@ unsigned long get_board_ddr_clk(void);
                                | CSOR_NAND_SPRZ_64     /* Spare size = 64 */ \
                                | CSOR_NAND_PB(64))     /* 64 Pages Per Block */
 
-#define CONFIG_SYS_NAND_ONFI_DETECTION
-
 #define CONFIG_SYS_NAND_FTIM0          (FTIM0_NAND_TCCST(0x7) | \
                                        FTIM0_NAND_TWP(0x18)   | \
                                        FTIM0_NAND_TWCHT(0x7) | \
@@ -177,26 +119,19 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
-
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
 #endif
 
 #ifdef CONFIG_NAND_BOOT
-#define CONFIG_SPL_PAD_TO              0x20000         /* block aligned */
-#define CONFIG_SYS_NAND_U_BOOT_OFFS    CONFIG_SPL_PAD_TO
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (640 << 10)
 #endif
 
 #if defined(CONFIG_TFABOOT) || \
        defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-#define CONFIG_QIXIS_I2C_ACCESS
-#define CONFIG_SYS_I2C_EARLY_INIT
 #endif
 
 /*
  * QIXIS Definitions
  */
-#define CONFIG_FSL_QIXIS
 
 #ifdef CONFIG_FSL_QIXIS
 #define QIXIS_BASE                     0x7fb00000
@@ -365,12 +300,6 @@ unsigned long get_board_ddr_clk(void);
 #define I2C_VOL_MONITOR_BUS_V_OVF      0x1
 #define I2C_VOL_MONITOR_BUS_V_SHIFT    3
 
-#define CONFIG_VID_FLS_ENV             "ls1043aqds_vdd_mv"
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_VID
-#endif
-#define CONFIG_VOL_MONITOR_IR36021_SET
-#define CONFIG_VOL_MONITOR_INA220
 /* The lowest and highest voltage allowed for LS1043AQDS */
 #define VDD_MV_MIN                     819
 #define VDD_MV_MAX                     1212
@@ -379,23 +308,10 @@ unsigned long get_board_ddr_clk(void);
  * Miscellaneous configurable options
  */
 
-#define CONFIG_SYS_HZ                  1000
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
-       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
-#else
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
-#endif
-
 /*
  * Environment
  */
 
-#define CONFIG_CMDLINE_TAG
-
 #include <asm/fsl_secure_boot.h>
 
 #endif /* __LS1043AQDS_H__ */