#define CONFIG_LAYERSCAPE_NS_ACCESS
-#define CONFIG_DIMM_SLOTS_PER_CTLR 1
/* Physical Memory Map */
#define SPD_EEPROM_ADDRESS 0x51
#endif
#ifdef CONFIG_NAND_BOOT
-#define CONFIG_SPL_PAD_TO 0x20000 /* block aligned */
#define CONFIG_SYS_NAND_U_BOOT_SIZE (640 << 10)
#endif
#if defined(CONFIG_TFABOOT) || \
defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-#define CONFIG_QIXIS_I2C_ACCESS
#endif
/*
* QIXIS Definitions
*/
-#define CONFIG_FSL_QIXIS
#ifdef CONFIG_FSL_QIXIS
#define QIXIS_BASE 0x7fb00000
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-
/*
* Environment
*/