#define SPL_NO_IFC
#endif
-#define CONFIG_REMAKE_ELF
-
#include <asm/arch/stream_id_lsch2.h>
#include <asm/arch/config.h>
/* Link Definitions */
-#ifdef CONFIG_TFABOOT
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
-#else
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
-#endif
#define CONFIG_VERY_BIG_RAM
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
#define CPU_RELEASE_ADDR secondary_boot_addr
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY 25000000 /* 25MHz */
-
/* Serial Port */
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
/* SD boot SPL */
#ifdef CONFIG_SD_BOOT
-
-#define CONFIG_SPL_MAX_SIZE 0x17000
-#define CONFIG_SPL_STACK 0x1001e000
-#define CONFIG_SPL_PAD_TO 0x1d000
-
-#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
- CONFIG_SPL_BSS_MAX_SIZE)
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
-#define CONFIG_SPL_BSS_START_ADDR 0x8f000000
-#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
-
#ifdef CONFIG_NXP_ESBC
#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
/*
/* NAND SPL */
#ifdef CONFIG_NAND_BOOT
-#define CONFIG_SPL_PBL_PAD
-#define CONFIG_SPL_MAX_SIZE 0x1a000
-#define CONFIG_SPL_STACK 0x1001d000
#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_SPL_MALLOC_START 0x80200000
-#define CONFIG_SPL_BSS_START_ADDR 0x80100000
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
-#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
#ifdef CONFIG_NXP_ESBC
#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
#endif
/* GPIO */
-#ifdef CONFIG_DM_GPIO
-#ifndef CONFIG_MPC8XXX_GPIO
-#define CONFIG_MPC8XXX_GPIO
-#endif
-#endif
/* IFC */
#ifndef SPL_NO_IFC
#if defined(CONFIG_TFABOOT) || \
(!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI))
-#define CONFIG_FSL_IFC
/*
* CONFIG_SYS_FLASH_BASE has the final address (core view)
* CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
#define CONFIG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000
#ifdef CONFIG_MTD_NOR_FLASH
-#define CONFIG_SYS_FLASH_QUIET_TEST
#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
#endif
#endif
/* I2C */
-/* PCIe */
-#ifndef SPL_NO_PCIE
-#define CONFIG_PCIE1 /* PCIE controller 1 */
-#define CONFIG_PCIE2 /* PCIE controller 2 */
-#define CONFIG_PCIE3 /* PCIE controller 3 */
-
-#ifdef CONFIG_PCI
-#define CONFIG_PCI_SCAN_SHOW
-#endif
-#endif
-
/* DSPI */
-#ifndef SPL_NO_DSPI
-#ifdef CONFIG_FSL_DSPI
-#define CONFIG_SPI_FLASH_STMICRO /* cs0 */
-#define CONFIG_SPI_FLASH_SST /* cs1 */
-#define CONFIG_SPI_FLASH_EON /* cs2 */
-#endif
-#endif
/* FMan ucode */
#ifndef SPL_NO_FMAN
#ifdef CONFIG_SYS_DPAA_FMAN
#define CONFIG_SYS_FM_MURAM_SIZE 0x60000
-#ifdef CONFIG_TFABOOT
-#define CONFIG_SYS_FMAN_FW_ADDR 0x900000
-#define CONFIG_SYS_QE_FW_ADDR 0x940000
-
-
-#else
-#if defined(CONFIG_SD_BOOT)
-/*
- * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
- * about 1MB (2040 blocks), Env is stored after the image, and the env size is
- * 0x2000 (16 blocks), 8 + 2040 + 16 = 2064, enlarge it to 18432(0x4800).
- */
-#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x4800)
-#define CONFIG_SYS_QE_FW_ADDR (512 * 0x4A00)
-#elif defined(CONFIG_QSPI_BOOT)
-#define CONFIG_SYS_FMAN_FW_ADDR 0x40900000
-#else
-/* FMan fireware Pre-load address */
-#define CONFIG_SYS_FMAN_FW_ADDR 0x60900000
-#define CONFIG_SYS_QE_FW_ADDR 0x60940000
-#endif
-#endif
-#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#endif
#endif
#define HWCONFIG_BUFFER_SIZE 128
#ifndef SPL_NO_MISC
-#ifndef CONFIG_SPL_BUILD
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(USB, usb, 0) \
func(DHCP, dhcp, na)
#include <config_distro_bootcmd.h>
-#endif
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:bank_intlv=auto\0" \
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0" \
- "fdt_addr=0x64f00000\0" \
"kernel_addr=0x61000000\0" \
"scriptaddr=0x80000000\0" \
"scripthdraddr=0x80080000\0" \
"kernelhdr_size_sd=0x10\0" \
"console=ttyS0,115200\0" \
"boot_os=y\0" \
- "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
BOOTENV \
"boot_scripts=ls1043ardb_boot.scr\0" \
"boot_script_hdr=hdr_ls1043ardb_bs.out\0" \
"bootm $load_addr#$board\0"
-#undef CONFIG_BOOTCOMMAND
#ifdef CONFIG_TFABOOT
#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
"env exists secureboot && esbc_halt;"
"env exists secureboot && esbc_halt;"
#define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \
"env exists secureboot && esbc_halt;"
-#else
-#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
- "env exists secureboot && esbc_halt;"
-#elif defined(CONFIG_SD_BOOT)
-#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \
- "env exists secureboot && esbc_halt;"
-#else
-#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \
- "env exists secureboot && esbc_halt;"
#endif
#endif
-#endif
-
-/* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
-
-#define CONFIG_SYS_MAXARGS 64 /* max command args */
-
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
#include <asm/arch/soc.h>