Convert CONFIG_SYS_SPL_MALLOC_SIZE et al to Kconfig

[platform/kernel/u-boot.git] / include / configs / ls1021aqds.h

diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 20560ee..e17bdca 100644 (file)
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -7,41 +7,18 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_DEEP_SLEEP
-
 #define CONFIG_SYS_INIT_RAM_ADDR       OCRAM_BASE_ADDR
 #define CONFIG_SYS_INIT_RAM_SIZE       OCRAM_SIZE
 
-#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-#define CONFIG_QIXIS_I2C_ACCESS
-#endif
-
 #ifdef CONFIG_SD_BOOT
-#define CONFIG_SPL_MAX_SIZE            0x1a000
-#define CONFIG_SPL_STACK               0x1001d000
-#define CONFIG_SPL_PAD_TO              0x1c000
-
-#define CONFIG_SYS_SPL_MALLOC_START    (CONFIG_SYS_TEXT_BASE + \
-               CONFIG_SYS_MONITOR_LEN)
-#define CONFIG_SYS_SPL_MALLOC_SIZE     0x100000
-#define CONFIG_SPL_BSS_START_ADDR      0x80100000
-#define CONFIG_SPL_BSS_MAX_SIZE                0x80000
 #define CONFIG_SYS_MONITOR_LEN         0xc0000
 #endif
 
 #ifdef CONFIG_NAND_BOOT
-#define CONFIG_SPL_MAX_SIZE            0x1a000
-#define CONFIG_SPL_STACK               0x1001d000
-#define CONFIG_SPL_PAD_TO              0x1c000
-
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (400 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST     CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 
-#define CONFIG_SYS_SPL_MALLOC_START    0x80200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE     0x100000
-#define CONFIG_SPL_BSS_START_ADDR      0x80100000
-#define CONFIG_SPL_BSS_MAX_SIZE                0x80000
 #define CONFIG_SYS_MONITOR_LEN         0x80000
 #endif
 
@@ -51,7 +28,6 @@
 #ifndef CONFIG_SYS_FSL_DDR4
 #define CONFIG_SYS_DDR_RAW_TIMING
 #endif
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
 
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000UL
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
@@ -148,7 +124,6 @@
 /*
  * QIXIS Definitions
  */
-#define CONFIG_FSL_QIXIS
 
 #ifdef CONFIG_FSL_QIXIS
 #define QIXIS_BASE                     0x7fb00000
@@ -268,9 +243,7 @@
 /*
  * Serial Port
  */
-#ifdef CONFIG_LPUART
-#define CONFIG_LPUART_32B_REG
-#else
+#ifndef CONFIG_LPUART
 #define CONFIG_SYS_NS16550_SERIAL
 #ifndef CONFIG_DM_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    1
@@ -300,18 +273,6 @@
  */
 
 /*
- * Video
- */
-#ifdef CONFIG_VIDEO_FSL_DCU_FB
-#define CONFIG_VIDEO_BMP_LOGO
-
-#define CONFIG_FSL_DIU_CH7301
-#define CONFIG_SYS_I2C_DVI_BUS_NUM     0
-#define CONFIG_SYS_I2C_QIXIS_ADDR      0x66
-#define CONFIG_SYS_I2C_DVI_ADDR                0x75
-#endif
-
-/*
  * eTSEC
  */
 
@@ -336,8 +297,6 @@
 #define TSEC2_PHYIDX                   0
 #define TSEC3_PHYIDX                   0
 
-#define CONFIG_ETHPRIME                        "eTSEC1"
-
 #define CONFIG_FSL_SGMII_RISER         1
 #define SGMII_RISER_PHY_OFFSET         0x1b
 
@@ -358,7 +317,6 @@
 #define CONFIG_PEN_ADDR_BIG_ENDIAN
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 #define CONFIG_SMP_PEN_ADDR            0x01ee0200
-#define COUNTER_FREQUENCY              12500000
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE           256
@@ -384,17 +342,6 @@
 
 #define CONFIG_LS102XA_STREAM_ID
 
-#define CONFIG_SYS_INIT_SP_OFFSET \
-       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
-       (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
-#else
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
-#endif
-
 /*
  * Environment
  */