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arm: Disable ATAGs support
[platform/kernel/u-boot.git] / include / configs / ls1021aqds.h
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index d75ac4e..a164796 100644 (file)
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -1,57 +1,33 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2019 NXP
  */
 
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_ARMV7_PSCI_1_0
-
 #define CONFIG_ARMV7_SECURE_BASE       OCRAM_BASE_S_ADDR
 
 #define CONFIG_SYS_FSL_CLK
 
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
 #define CONFIG_DEEP_SLEEP
 
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + 16 * 1024 * 1024)
-
 #define CONFIG_SYS_INIT_RAM_ADDR       OCRAM_BASE_ADDR
 #define CONFIG_SYS_INIT_RAM_SIZE       OCRAM_SIZE
 
 #ifndef __ASSEMBLY__
 unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
 #endif
 
 #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_SYS_CLK_FREQ            100000000
-#define CONFIG_DDR_CLK_FREQ            100000000
 #define CONFIG_QIXIS_I2C_ACCESS
 #else
 #define CONFIG_SYS_CLK_FREQ            get_board_sys_clk()
-#define CONFIG_DDR_CLK_FREQ            get_board_ddr_clk()
-#endif
-
-#ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1021aqds/ls102xa_pbi.cfg
 #endif
 
 #ifdef CONFIG_SD_BOOT
-#ifdef CONFIG_SD_BOOT_QSPI
-#define CONFIG_SYS_FSL_PBL_RCW \
-       board/freescale/ls1021aqds/ls102xa_rcw_sd_qspi.cfg
-#else
-#define CONFIG_SYS_FSL_PBL_RCW \
-       board/freescale/ls1021aqds/ls102xa_rcw_sd_ifc.cfg
-#endif
-
-#define CONFIG_SPL_TEXT_BASE           0x10000000
 #define CONFIG_SPL_MAX_SIZE            0x1a000
 #define CONFIG_SPL_STACK               0x1001d000
 #define CONFIG_SPL_PAD_TO              0x1c000
@@ -65,9 +41,6 @@ unsigned long get_board_ddr_clk(void);
 #endif
 
 #ifdef CONFIG_NAND_BOOT
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg
-
-#define CONFIG_SPL_TEXT_BASE           0x10000000
 #define CONFIG_SPL_MAX_SIZE            0x1a000
 #define CONFIG_SPL_STACK               0x1001d000
 #define CONFIG_SPL_PAD_TO              0x1c000
@@ -85,7 +58,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_MONITOR_LEN         0x80000
 #endif
 
-#define CONFIG_DDR_SPD
 #define SPD_EEPROM_ADDRESS             0x51
 #define CONFIG_SYS_SPD_BUS_NUM         0
 
@@ -98,17 +70,10 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000UL
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_DDR_ECC
 #ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
 #endif
 
-#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \
-       !defined(CONFIG_QSPI_BOOT)
-#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#endif
-
 /*
  * IFC Definitions
  */
@@ -338,20 +303,17 @@ unsigned long get_board_ddr_clk(void);
 /*
  * I2C
  */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
+
+/* GPIO */
+#ifdef CONFIG_DM_GPIO
+#ifndef CONFIG_MPC8XXX_GPIO
+#define CONFIG_MPC8XXX_GPIO
+#endif
+#endif
 
 /* EEPROM */
-#define CONFIG_ID_EEPROM
 #define CONFIG_SYS_I2C_EEPROM_NXID
 #define CONFIG_SYS_EEPROM_BUS_NUM              0
-#define CONFIG_SYS_I2C_EEPROM_ADDR             0x57
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN         1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS      3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  5
 
 /*
  * I2C bus multiplexer
@@ -364,22 +326,6 @@ unsigned long get_board_ddr_clk(void);
  * MMC
  */
 
-/* SPI */
-#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-/* QSPI */
-#define QSPI0_AMBA_BASE                        0x40000000
-#define FSL_QSPI_FLASH_SIZE            (1 << 24)
-#define FSL_QSPI_FLASH_NUM             2
-
-/* DSPI */
-
-/* DM SPI */
-#if defined(CONFIG_FSL_DSPI) || defined(CONFIG_FSL_QSPI)
-#define CONFIG_DM_SPI_FLASH
-#define CONFIG_SPI_FLASH_DATAFLASH
-#endif
-#endif
-
 /*
  * Video
  */
@@ -420,8 +366,6 @@ unsigned long get_board_ddr_clk(void);
 
 #define CONFIG_ETHPRIME                        "eTSEC1"
 
-#define CONFIG_PHY_REALTEK
-
 #define CONFIG_HAS_ETH0
 #define CONFIG_HAS_ETH1
 #define CONFIG_HAS_ETH2
@@ -443,8 +387,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_PCI_SCAN_SHOW
 #endif
 
-#define CONFIG_CMDLINE_TAG
-
 #define CONFIG_PEN_ADDR_BIG_ENDIAN
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 #define CONFIG_SMP_PEN_ADDR            0x01ee0200
@@ -461,13 +403,11 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_LPUART
 #define CONFIG_EXTRA_ENV_SETTINGS       \
        "bootargs=root=/dev/ram0 rw console=ttyLP0,115200\0" \
-       "fdt_high=0xffffffff\0"         \
        "initrd_high=0xffffffff\0"      \
        "hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=null\0"
 #else
 #define CONFIG_EXTRA_ENV_SETTINGS      \
        "bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \
-       "fdt_high=0xffffffff\0"         \
        "initrd_high=0xffffffff\0"      \
        "hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=null\0"
 #endif
@@ -475,11 +415,7 @@ unsigned long get_board_ddr_clk(void);
 /*
  * Miscellaneous configurable options
  */
-
-#define CONFIG_SYS_MEMTEST_START       0x80000000
-#define CONFIG_SYS_MEMTEST_END         0x9fffffff
-
-#define CONFIG_SYS_LOAD_ADDR           0x82000000
+#define CONFIG_SYS_BOOTMAPSZ           (256 << 20)
 
 #define CONFIG_LS102XA_STREAM_ID
 
@@ -497,24 +433,6 @@ unsigned long get_board_ddr_clk(void);
 /*
  * Environment
  */
-#define CONFIG_ENV_OVERWRITE
-
-#if defined(CONFIG_SD_BOOT)
-#define CONFIG_ENV_OFFSET              0x300000
-#define CONFIG_SYS_MMC_ENV_DEV         0
-#define CONFIG_ENV_SIZE                        0x2000
-#elif defined(CONFIG_QSPI_BOOT)
-#define CONFIG_ENV_SIZE                        0x2000          /* 8KB */
-#define CONFIG_ENV_OFFSET              0x300000        /* 3MB */
-#define CONFIG_ENV_SECT_SIZE           0x10000
-#elif defined(CONFIG_NAND_BOOT)
-#define CONFIG_ENV_SIZE                        0x2000
-#define CONFIG_ENV_OFFSET              (10 * CONFIG_SYS_NAND_BLOCK_SIZE)
-#else
-#define CONFIG_ENV_ADDR                        (CONFIG_SYS_FLASH_BASE + 0x300000)
-#define CONFIG_ENV_SIZE                        0x2000
-#define CONFIG_ENV_SECT_SIZE           0x20000 /* 128K (one sector) */
-#endif
 
 #include <asm/fsl_secure_boot.h>
 #define CONFIG_SYS_BOOTM_LEN   (64 << 20) /* Increase max gunzip size */
Domain: System / Kernel;