configs: move CONFIG_SPL_TEXT_BASE to Kconfig
[platform/kernel/u-boot.git] / include / configs / ls1021aqds.h
index 0b4a6a4..3cbbd73 100644 (file)
@@ -51,7 +51,6 @@ unsigned long get_board_ddr_clk(void);
        board/freescale/ls1021aqds/ls102xa_rcw_sd_ifc.cfg
 #endif
 
-#define CONFIG_SPL_TEXT_BASE           0x10000000
 #define CONFIG_SPL_MAX_SIZE            0x1a000
 #define CONFIG_SPL_STACK               0x1001d000
 #define CONFIG_SPL_PAD_TO              0x1c000
@@ -67,7 +66,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_NAND_BOOT
 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg
 
-#define CONFIG_SPL_TEXT_BASE           0x10000000
 #define CONFIG_SPL_MAX_SIZE            0x1a000
 #define CONFIG_SPL_STACK               0x1001d000
 #define CONFIG_SPL_PAD_TO              0x1c000
@@ -85,13 +83,10 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_MONITOR_LEN         0x80000
 #endif
 
-#define CONFIG_NR_DRAM_BANKS           1
-
 #define CONFIG_DDR_SPD
 #define SPD_EEPROM_ADDRESS             0x51
 #define CONFIG_SYS_SPD_BUS_NUM         0
 
-#define CONFIG_FSL_DDR_INTERACTIVE     /* Interactive debugging */
 #ifndef CONFIG_SYS_FSL_DDR4
 #define CONFIG_SYS_DDR_RAW_TIMING
 #endif
@@ -109,7 +104,6 @@ unsigned long get_board_ddr_clk(void);
 
 #if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \
        !defined(CONFIG_QSPI_BOOT)
-#define CONFIG_U_QE
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
 #endif
 
@@ -148,9 +142,6 @@ unsigned long get_board_ddr_clk(void);
                                        FTIM2_NOR_TWP(0x1c))
 #define CONFIG_SYS_NOR_FTIM3           0
 
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 #define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45
 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
@@ -351,6 +342,15 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
 #define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 
+/* EEPROM */
+#define CONFIG_ID_EEPROM
+#define CONFIG_SYS_I2C_EEPROM_NXID
+#define CONFIG_SYS_EEPROM_BUS_NUM              0
+#define CONFIG_SYS_I2C_EEPROM_ADDR             0x57
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN         1
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS      3
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  5
+
 /*
  * I2C bus multiplexer
  */
@@ -396,7 +396,6 @@ unsigned long get_board_ddr_clk(void);
  */
 
 #ifdef CONFIG_TSEC_ENET
-#define CONFIG_MII
 #define CONFIG_MII_DEFAULT_TSEC                3
 #define CONFIG_TSEC1                   1
 #define CONFIG_TSEC1_NAME              "eTSEC1"
@@ -515,8 +514,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_ENV_SECT_SIZE           0x20000 /* 128K (one sector) */
 #endif
 
-#define CONFIG_MISC_INIT_R
-
 #include <asm/fsl_secure_boot.h>
 #define CONFIG_SYS_BOOTM_LEN   (64 << 20) /* Increase max gunzip size */