Convert CONFIG_SPL_PAD_TO et al to Kconfig

[platform/kernel/u-boot.git] / include / configs / ls1021aiot.h

diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index 7a7640a..f1e42a5 100644 (file)
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -7,15 +7,9 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
-
-#define CONFIG_SYS_FSL_CLK
-
 #define CONFIG_SYS_INIT_RAM_ADDR       OCRAM_BASE_ADDR
 #define CONFIG_SYS_INIT_RAM_SIZE       OCRAM_SIZE
 
-#define CONFIG_SYS_CLK_FREQ            100000000
-
 /*
  * DDR: 800 MHz ( 1600 MT/s data rate )
  */
@@ -48,17 +42,7 @@
 #define SDRAM_CFG_BI                   0x00000001
 
 #ifdef CONFIG_SD_BOOT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_I2C
-#define CONFIG_SPL_WATCHDOG
-#define CONFIG_SPL_MMC
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR        0xe8
-
-#define CONFIG_SPL_MAX_SIZE            0x1a000
 #define CONFIG_SPL_STACK               0x1001d000
-#define CONFIG_SPL_PAD_TO              0x1c000
 
 #define CONFIG_SYS_SPL_MALLOC_START    (CONFIG_SYS_TEXT_BASE + \
                CONFIG_SYS_MONITOR_LEN)
@@ -71,8 +55,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000UL
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_CHIP_SELECTS_PER_CTRL   4
-
 /*
  * Serial Port
  */
@@ -93,22 +75,13 @@
  */
 
 /* SATA */
-#define CONFIG_SCSI_AHCI_PLAT
 #ifndef PCI_DEVICE_ID_FREESCALE_AHCI
 #define PCI_DEVICE_ID_FREESCALE_AHCI   0x0440
 #endif
 #define CONFIG_SCSI_DEV_LIST           {PCI_VENDOR_ID_FREESCALE, \
        PCI_DEVICE_ID_FREESCALE_AHCI}
 
-#define CONFIG_SYS_SCSI_MAX_SCSI_ID    1
-#define CONFIG_SYS_SCSI_MAX_LUN                1
-#define CONFIG_SYS_SCSI_MAX_DEVICE     (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
-               CONFIG_SYS_SCSI_MAX_LUN)
-
 /* SPI */
-#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-#define CONFIG_SPI_FLASH_SPANSION
-#endif
 
 /*
  * eTSEC
@@ -129,12 +102,6 @@
 
 #define TSEC1_PHYIDX                   0
 #define TSEC2_PHYIDX                   0
-
-#define CONFIG_ETHPRIME                        "eTSEC2"
-
-#define CONFIG_HAS_ETH0
-#define CONFIG_HAS_ETH1
-#define CONFIG_HAS_ETH2
 #endif
 
 /* PCIe */
@@ -150,7 +117,6 @@
 #define CONFIG_PEN_ADDR_BIG_ENDIAN
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 #define CONFIG_SMP_PEN_ADDR            0x01ee0200
-#define COUNTER_FREQUENCY              12500000
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE           256
@@ -173,18 +139,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
-#else
-/* start of monitor */
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#endif
-
-#define CONFIG_SYS_QE_FW_ADDR  0x67f40000
-
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
 #include <asm/fsl_secure_boot.h>
 
 #endif