/* SPDX-License-Identifier: GPL-2.0+ */
/*
+ * Copyright 2020 NXP
* Copyright 2016 Freescale Semiconductor, Inc.
*/
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 1
#define CONFIG_SYS_SDRAM_SIZE 0x40000000
-#define CONFIG_CMD_MEMINFO
-#define CONFIG_SYS_MEMTEST_START 0x80000000
-#define CONFIG_SYS_MEMTEST_END 0x9fffffff
-
-/* ENV */
-#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000
/*
* I2C IO expander
*/
#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_MEMINFO
-#define CONFIG_SYS_MEMTEST_START 0x80000000
-#define CONFIG_SYS_MEMTEST_END 0x9fffffff
-
#undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"verify=no\0" \
"initrd_high=0xffffffffffffffff\0" \
"fdt_addr=0x00f00000\0" \
"kernel_addr=0x01000000\0" \
- "kernelheader_addr=0x800000\0" \
+ "kernelheader_addr=0x600000\0" \
"scriptaddr=0x80000000\0" \
"scripthdraddr=0x80080000\0" \
"fdtheader_addr_r=0x80100000\0" \