/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
* Copyright 2016 Freescale Semiconductor, Inc.
*/
#include "ls1012a_common.h"
/* DDR */
-#define CONFIG_DIMM_SLOTS_PER_CTLR 1
-#define CONFIG_CHIP_SELECTS_PER_CTRL 1
-#define CONFIG_SYS_SDRAM_SIZE 0x40000000
+#define CFG_SYS_SDRAM_SIZE 0x40000000
/*
* I2C IO expander
#define __PHY_ETH2_MASK 0xFB
#define __PHY_ETH1_MASK 0xFD
-/* MMC */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
-
-#define CONFIG_PCIE1 /* PCIE controller 1 */
-
-#define CONFIG_PCI_SCAN_SHOW
-
-#undef CONFIG_EXTRA_ENV_SETTINGS
-#define CONFIG_EXTRA_ENV_SETTINGS \
+#undef CFG_EXTRA_ENV_SETTINGS
+#define CFG_EXTRA_ENV_SETTINGS \
"verify=no\0" \
"initrd_high=0xffffffffffffffff\0" \
- "fdt_addr=0x00f00000\0" \
"kernel_addr=0x01000000\0" \
"kernelheader_addr=0x600000\0" \
"scriptaddr=0x80000000\0" \
"$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
"bootm $load_addr#$board\0"
-#undef CONFIG_BOOTCOMMAND
#ifdef CONFIG_TFABOOT
#undef QSPI_NOR_BOOTCOMMAND
#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\
"env exists secureboot && esbc_halt;"
-#else
-#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\
- "env exists secureboot && esbc_halt;"
#endif
#include <asm/fsl_secure_boot.h>