#define CONFIG_ARMV7
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SYS_ARCH_TIMER
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_TEXT_BASE 0x0c001000
#define CONFIG_SPL_TARGET "u-boot-spi.gph"
#define CONFIG_SYS_DCACHE_OFF
#define CONFIG_SYS_SGMII_RATESCALE 2
/* Keyston Navigator Configuration */
+#define CONFIG_TI_KSNAV
#define CONFIG_KSNAV_QM_BASE_ADDRESS KS2_QM_BASE_ADDRESS
#define CONFIG_KSNAV_QM_CONF_BASE KS2_QM_CONF_BASE
#define CONFIG_KSNAV_QM_DESC_SETUP_BASE KS2_QM_DESC_SETUP_BASE
#define CONFIG_KSNAV_QM_QPOOL_NUM KS2_QM_QPOOL_NUM
/* NETCP pktdma */
+#define CONFIG_KSNAV_PKTDMA_NETCP
#define CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE KS2_NETCP_PDMA_CTRL_BASE
#define CONFIG_KSNAV_NETCP_PDMA_TX_BASE KS2_NETCP_PDMA_TX_BASE
#define CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM KS2_NETCP_PDMA_TX_CH_NUM
#define CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE KS2_NETCP_PDMA_TX_SND_QUEUE
/* Keystone net */
+#define CONFIG_DRIVER_TI_KEYSTONE_NET
#define CONFIG_KSNET_MAC_ID_BASE KS2_MAC_ID_BASE_ADDR
#define CONFIG_KSNET_NETCP_BASE KS2_NETCP_BASE
#define CONFIG_KSNET_SERDES_SGMII_BASE KS2_SGMII_SERDES_BASE
+#define CONFIG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE
#define CONFIG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES
+/* SerDes */
+#define CONFIG_TI_KEYSTONE_SERDES
+
/* AEMIF */
#define CONFIG_TI_AEMIF
#define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_EXTRA_ENV_SETTINGS \
- "boot=ramfs\0" \
+ "boot=ubi\0" \
"tftp_root=/\0" \
"nfs_root=/export\0" \
"mem_lpae=1\0" \
"run_kern=bootm ${addr_kern} - ${addr_fdt}\0" \
"init_net=run args_all args_net\0" \
"init_ubi=run args_all args_ubi; " \
- "ubi part ubifs; ubifsmount boot;" \
+ "ubi part ubifs; ubifsmount ubi:boot;" \
"ubifsload ${addr_secdb_key} securedb.key.bin;\0" \
"get_fdt_net=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0" \
"get_fdt_ubi=ubifsload ${addr_fdt} ${name_fdt}\0" \
#include <asm/arch/clock.h>
#define CONFIG_SYS_HZ_CLOCK clk_get_rate(KS2_CLK1_6)
-/* Maximum memory size for relocated U-boot at the end of the DDR3 memory
- which is NOT applicable for DDR ECC test */
-#define CONFIG_MAX_UBOOT_MEM_SIZE (4 << 20) /* 4 MiB */
-
#endif /* __CONFIG_KS2_EVM_H */