#include <linux/stringify.h>
#include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
-
-#define CONFIG_SPL_MAX_SIZE (124 * SZ_1K)
-#define CONFIG_SYS_MONITOR_LEN (512 * SZ_1K)
-
/* GUID for capsule updatable firmware image */
#define KONTRON_PITX_IMX8M_FIT_IMAGE_GUID \
EFI_GUID(0xc898e959, 0x5b1f, 0x4e6d, 0x88, 0xe0, \
0x40, 0xd4, 0x5c, 0xca, 0x13, 0x99)
#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_STACK 0x187FF0
-#define CONFIG_SPL_BSS_START_ADDR 0x00180000
-#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K
-#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K
-#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
-#define CONFIG_MALLOC_F_ADDR 0x182000
+#define CFG_MALLOC_F_ADDR 0x182000
/* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
-#define CONFIG_POWER_PFUZE100
-#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
+#define CFG_POWER_PFUZE100_I2C_ADDR 0x08
#endif
/* ENET1 Config */
#if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_MXC_PHYADDR 0
+#define CFG_FEC_MXC_PHYADDR 0
#define PHY_ANEG_TIMEOUT 20000
#include <config_distro_bootcmd.h>
/* Initial environment variables */
-#define CONFIG_EXTRA_ENV_SETTINGS \
+#define CFG_EXTRA_ENV_SETTINGS \
"image=Image\0" \
"console=ttymxc2,115200\0" \
"boot_fdt=try\0" \
BOOTENV
-#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
-#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+#define CFG_SYS_INIT_RAM_ADDR 0x40000000
+#define CFG_SYS_INIT_RAM_SIZE 0x80000
-#define CONFIG_SYS_SDRAM_BASE 0x40000000
+#define CFG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
-#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
+#define CFG_MXC_UART_BASE UART_BASE_ADDR(3)
-#define CONFIG_SYS_FSL_USDHC_NUM 2
-#define CONFIG_SYS_FSL_ESDHC_ADDR 0
+#define CFG_SYS_FSL_USDHC_NUM 2
+#define CFG_SYS_FSL_ESDHC_ADDR 0
#endif