#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
-#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
/* Board Clock */
#define RMOBILE_XTAL_CLK 20000000u
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
-#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
-
-#define CONFIG_SYS_TMU_CLK_DIV 4
#define CONFIG_EXTRA_ENV_SETTINGS \
- "fdt_high=0xffffffff\0" \
- "initrd_high=0xffffffff\0"
+ "bootm_size=0x10000000\0"
/* SPL support */
-#define CONFIG_SPL_TEXT_BASE 0xe6300000
#define CONFIG_SPL_STACK 0xe6340000
#define CONFIG_SPL_MAX_SIZE 0x4000
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000
#ifdef CONFIG_SPL_BUILD
#define CONFIG_CONS_SCIF0
#define CONFIG_SH_SCIF_CLK_FREQ 65000000