powerpc: Migrate HIGH_BATS to Kconfig
[platform/kernel/u-boot.git] / include / configs / kmopti2.h
index fa12d41..2f19b2e 100644 (file)
  * MMU Setup
  */
 
-#define CONFIG_HIGH_BATS       1       /* High BATs supported */
-
 /* DDR: cache cacheable */
 #define CONFIG_SYS_IBAT0L      (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
                                BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
  */
 #define CONFIG_SYS_SICRL       SICRL_IRQ_CKS
 
-/*
- * Hardware Reset Configuration Word
- */
-#define CONFIG_SYS_HRCW_LOW (\
-       HRCWL_LCL_BUS_TO_SCB_CLK_1X1 | \
-       HRCWL_DDR_TO_SCB_CLK_2X1 | \
-       HRCWL_CSB_TO_CLKIN_2X1 | \
-       HRCWL_CORE_TO_CSB_2_5X1 | \
-       HRCWL_CE_PLL_VCO_DIV_2 | \
-       HRCWL_CE_TO_PLL_1X3)
-
-#define CONFIG_SYS_HRCW_HIGH (\
-       HRCWH_PCI_AGENT | \
-       HRCWH_PCI_ARBITER_DISABLE | \
-       HRCWH_CORE_ENABLE | \
-       HRCWH_FROM_0X00000100 | \
-       HRCWH_BOOTSEQ_DISABLE | \
-       HRCWH_SW_WATCHDOG_DISABLE | \
-       HRCWH_ROM_LOC_LOCAL_16BIT | \
-       HRCWH_BIG_ENDIAN | \
-       HRCWH_LALE_NORMAL)
-
 #define CONFIG_SYS_DDRCDR (\
        DDRCDR_EN | \
        DDRCDR_PZ_MAXZ | \