#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_DISPLAY_BOARDINFO
-
/* KMBEC FPGA (PRIO) */
#define CONFIG_SYS_KMBEC_FPGA_BASE 0xE8000000
#define CONFIG_SYS_KMBEC_FPGA_SIZE 64
#define CONFIG_SYS_DDR_CS0_CONFIG (\
CSCONFIG_EN | \
CSCONFIG_AP | \
- CSCONFIG_ODT_RD_ONLY_CURRENT | \
+ CSCONFIG_ODT_WR_ONLY_CURRENT | \
CSCONFIG_BANK_BIT_3 | \
CSCONFIG_ROW_BIT_13 | \
CSCONFIG_COL_BIT_10)
#define CONFIG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN | CSCONFIG_AP | \
CSCONFIG_ROW_BIT_13 | \
CSCONFIG_COL_BIT_10 | \
- CSCONFIG_ODT_RD_ONLY_CURRENT)
+ CSCONFIG_ODT_WR_ONLY_CURRENT)
#endif
#define CONFIG_SYS_DDR_CLK_CNTL (\
#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-
#ifdef CONFIG_KMCOGE5NE
/* BFTIC3: icache cacheable, but dcache-inhibit and guarded */
#define CONFIG_SYS_IBAT6L (\