#define CONFIG_PHYS_64BIT
#define CONFIG_PPC_P2041
-#define CONFIG_SYS_TEXT_BASE 0xfff80000
+#define CONFIG_SYS_TEXT_BASE 0xfff40000
#define CONFIG_KM_DEF_NETDEV "netdev=eth0\0"
#define CONFIG_NAND_ECC_BCH
+#define CONFIG_DISPLAY_BOARDINFO
+
/* common KM defines */
#include "keymile-common.h"
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_MTD_NAND_VERIFY_WRITE
#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
+#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
/* Serial Port - controlled on board with jumper J8
* shorted - index 1
*/
#define CONFIG_CONS_INDEX 1
-#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
/*
* eSPI - Enhanced SPI
*/
-#define CONFIG_FSL_ESPI
-#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_BAR /* 4 byte-addressing */
-#define CONFIG_SPI_FLASH_STMICRO
-#define CONFIG_SPI_FLASH_SPANSION
#define CONFIG_CMD_SF
#define CONFIG_SF_DEFAULT_SPEED 20000000
#define CONFIG_SF_DEFAULT_MODE 0
#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000
#define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull
#define CONFIG_SYS_BMAN_MEM_SIZE 0x00200000
+#define CONFIG_SYS_BMAN_SP_CENA_SIZE 0x4000
+#define CONFIG_SYS_BMAN_SP_CINH_SIZE 0x1000
+#define CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_MEM_BASE
+#define CONFIG_SYS_BMAN_CENA_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1)
+#define CONFIG_SYS_BMAN_CINH_BASE (CONFIG_SYS_BMAN_MEM_BASE + \
+ CONFIG_SYS_BMAN_CENA_SIZE)
+#define CONFIG_SYS_BMAN_CINH_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1)
+#define CONFIG_SYS_BMAN_SWP_ISDR_REG 0xE08
#define CONFIG_SYS_QMAN_NUM_PORTALS 10
#define CONFIG_SYS_QMAN_MEM_BASE 0xf4200000
#define CONFIG_SYS_QMAN_MEM_PHYS 0xff4200000ull
#define CONFIG_SYS_QMAN_MEM_SIZE 0x00200000
+#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000
+#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000
+#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE
+#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
+#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \
+ CONFIG_SYS_QMAN_CENA_SIZE)
+#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
+#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08
#define CONFIG_SYS_DPAA_FMAN
#define CONFIG_SYS_DPAA_PME
#define CONFIG_PCI_INDIRECT_BRIDGE
#define CONFIG_PCI_PNP /* do pci plug-and-play */
-#define CONFIG_E1000
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#define CONFIG_DOS_PARTITION
* additionnal command line configuration.
*/
#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
#define CONFIG_CMD_ERRATA
/* we don't need flash support */
#define CONFIG_SYS_NO_FLASH
-#undef CONFIG_CMD_IMLS
-#undef CONFIG_CMD_FLASH
#undef CONFIG_FLASH_CFI_MTD
#undef CONFIG_JFFS2_CMDLINE
"sf probe 0;sf erase 0 +${filesize};" \
"sf write ${load_addr_r} 0 ${filesize};\0" \
"set_fdthigh=true\0" \
+ "checkfdt=true\0" \
""
#define CONFIG_HW_ENV_SETTINGS \