* (C) Copyright 2010-2011
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
/*
#ifndef _CONFIG_KM_ARM_H
#define _CONFIG_KM_ARM_H
+#define CONFIG_SYS_GENERIC_BOARD
+
/* We got removed from Linux mach-types.h */
#define MACH_TYPE_KM_KIRKWOOD 2255
*/
#define CONFIG_MARVELL
#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
-#define CONFIG_KIRKWOOD /* SOC Family Name */
#define CONFIG_KW88F6281 /* SOC Name */
#define CONFIG_MACH_KM_KIRKWOOD /* Machine type */
#define CONFIG_MACH_TYPE MACH_TYPE_KM_KIRKWOOD
+#define CONFIG_NAND_ECC_BCH
+#define CONFIG_BCH
+
/* include common defines/options for all Keymile boards */
#include "keymile-common.h"
#define CONFIG_CMD_NAND
#define CONFIG_CMD_SF
-#define CONFIG_SOFT_I2C /* I2C bit-banged */
+
+/* SPI NOR Flash default params, used by sf commands */
+#define CONFIG_SF_DEFAULT_SPEED 8100000
+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
#define CONFIG_ENV_SPI_BUS 0
#define CONFIG_ENV_SPI_CS 0
-#define CONFIG_ENV_SPI_MAX_HZ 5000000
+#define CONFIG_ENV_SPI_MAX_HZ 8100000
#define CONFIG_ENV_SPI_MODE SPI_MODE_3
#endif
+/* Reserve 4 MB for malloc */
+#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
+
#include "asm/arch/config.h"
#define CONFIG_SYS_TEXT_BASE 0x07d00000 /* code address before reloc */
#define CONFIG_KM_PHRAM 0x17F000
#define CONFIG_KM_CRAMFS_ADDR 0x2400000
-#define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 4096KBytes */
+#define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 3098KBytes */
+#define CONFIG_KM_FDT_ADDR 0x23E0000 /* 128KBytes */
/* architecture specific default bootargs */
#define CONFIG_KM_DEF_BOOT_ARGS_CPU \
" boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}"
#define CONFIG_KM_DEF_ENV_CPU \
- "boot=bootm ${load_addr_r} - -\0" \
- "cramfsloadfdt=true\0" \
- "u-boot="xstr(CONFIG_HOSTNAME) "/u-boot.kwb\0" \
+ "u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0" \
CONFIG_KM_UPDATE_UBOOT \
+ "set_fdthigh=setenv fdt_high ${kernelmem}\0" \
""
#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
#define CONFIG_MISC_INIT_R
+/* Pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT
+
/*
* NS16550 Configuration
*/
/*
* Commands configuration
*/
-#define CONFIG_CMD_ELF
#define CONFIG_CMD_MTDPARTS
-#define CONFIG_CMD_NFS
/*
* Without NOR FLASH we need this
*/
#define CONFIG_SYS_NO_FLASH
-#undef CONFIG_CMD_FLASH
-#undef CONFIG_CMD_IMLS
/*
* NAND Flash configuration
#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */
#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
#define CONFIG_NR_DRAM_BANKS 4
-#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
/*
#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
#define CONFIG_PHY_BASE_ADR 0
#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
+#define CONFIG_KM_COMMON_ETH_INIT /* standard km ethernet_present for piggy */
/*
* UBI related stuff
/*
* I2C related stuff
*/
+#undef CONFIG_I2C_MVTWSI
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_INIT_BOARD
+
#define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */
-#if defined(CONFIG_SOFT_I2C)
+#define CONFIG_SYS_NUM_I2C_BUSES 6
+#define CONFIG_SYS_I2C_MAX_HOPS 1
+#define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \
+ {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
+ {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
+ {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
+ {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
+ {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
+ }
+
#ifndef __ASSEMBLY__
-#include <asm/arch-kirkwood/gpio.h>
+#include <asm/arch/gpio.h>
extern void __set_direction(unsigned pin, int high);
void set_sda(int state);
void set_scl(int state);
int get_scl(void);
#define KM_KIRKWOOD_SDA_PIN 8
#define KM_KIRKWOOD_SCL_PIN 9
+#define KM_KIRKWOOD_SOFT_I2C_GPIOS 0x0300
#define KM_KIRKWOOD_ENV_WP 38
#define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0)
#define I2C_DELAY udelay(1)
#define I2C_SOFT_DECLARATIONS
-#endif
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0x0
+#define CONFIG_SYS_I2C_SOFT_SPEED 100000
/* EEprom support 24C128, 24C256 valid for environment eeprom */
#define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_EEPROM_WREN
#define CONFIG_ENV_OFFSET 0x0 /* no bracets! */
#define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET)
-#define CONFIG_I2C_ENV_EEPROM_BUS KM_ENV_BUS "\0"
+#define CONFIG_I2C_ENV_EEPROM_BUS KM_ENV_BUS
#define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */
#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
#endif
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
-#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_STMICRO
/* SPI bus claim MPP configuration */
#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
#define CONFIG_KM_NEW_ENV \
"newenv=sf probe 0;" \
- "sf erase " xstr(CONFIG_ENV_OFFSET) " " \
- xstr(CONFIG_ENV_TOTAL_SIZE)"\0"
+ "sf erase " __stringify(CONFIG_ENV_OFFSET) " " \
+ __stringify(CONFIG_ENV_TOTAL_SIZE)"\0"
#else
#define CONFIG_KM_NEW_ENV \
"newenv=setenv addr 0x100000 && " \
- "i2c dev 1; mw.b ${addr} 0 4 && " \
- "eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \
- " ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && " \
- "eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \
- " ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0"
+ "i2c dev " __stringify(CONFIG_I2C_ENV_EEPROM_BUS) "; " \
+ "mw.b ${addr} 0 4 && " \
+ "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \
+ " ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && " \
+ "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \
+ " ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0"
+#endif
+
+#ifndef CONFIG_KM_BOARD_EXTRA_ENV
+#define CONFIG_KM_BOARD_EXTRA_ENV ""
#endif
/*
* Default environment variables
*/
#define CONFIG_EXTRA_ENV_SETTINGS \
+ CONFIG_KM_BOARD_EXTRA_ENV \
CONFIG_KM_DEF_ENV \
CONFIG_KM_NEW_ENV \
"arch=arm\0" \
- "EEprom_ivm=" KM_IVM_BUS "\0" \
""
#if defined(CONFIG_SYS_NO_FLASH)
#define CONFIG_KM_RESERVED_PRAM 0x801000
/* address for the bootcount (taken from end of RAM) */
#define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM)
+/* Use generic bootcount RAM driver */
+#define CONFIG_BOOTCOUNT_RAM
/* enable POST tests */
#define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS)
#define CONFIG_POST_EXTERNAL_WORD_FUNCS
#define CONFIG_CMD_DIAG
+/* we do the whole PCIe FPGA config stuff here */
+#define CONFIG_BOARD_LATE_INIT
+
#endif /* _CONFIG_KM_ARM_H */