* NAND FLASH
*----------------------------------------------------------------------*/
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
#define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */
+#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
+
/*-----------------------------------------------------------------------
* DDR SDRAM
*----------------------------------------------------------------------*/
#define CONFIG_CMD_PCI
#define CONFIG_CMD_SNTP
+/*
+ * Don't run the memory POST on the NAND-booting version. It will
+ * overwrite part of the U-Boot image which is already loaded from NAND
+ * to SDRAM.
+ */
+#if defined(CONFIG_NAND_U_BOOT)
+#define CONFIG_SYS_POST_MEMORY_ON 0
+#else
+#define CONFIG_SYS_POST_MEMORY_ON CONFIG_SYS_POST_MEMORY
+#endif
+
/* POST support */
#define CONFIG_POST (CONFIG_SYS_POST_CACHE | \
CONFIG_SYS_POST_CPU | \
CONFIG_SYS_POST_ETHER | \
CONFIG_SYS_POST_I2C | \
- CONFIG_SYS_POST_MEMORY | \
+ CONFIG_SYS_POST_MEMORY_ON | \
CONFIG_SYS_POST_UART)
/* Define here the base-addresses of the UARTs to test in POST */