Merge branch 'next' of ../next

[platform/kernel/u-boot.git] / include / configs / kilauea.h

diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h
index 26cb854..8d4ce8d 100644 (file)
--- a/include/configs/kilauea.h
+++ b/include/configs/kilauea.h
@@ -234,9 +234,11 @@
  *
  * DDR Autocalibration Method_B is the default.
  */
+#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
 #define        CONFIG_PPC4xx_DDR_AUTOCALIBRATION       /* IBM DDR autocalibration */
 #define        DEBUG_PPC4xx_DDR_AUTOCALIBRATION        /* dynamic DDR autocal debug */
 #undef CONFIG_PPC4xx_DDR_METHOD_A
+#endif
 
 #define        CONFIG_SYS_SDRAM0_MB0CF_BASE    ((  0 << 20) + CONFIG_SYS_SDRAM_BASE)
 
@@ -372,9 +374,15 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address  */
 
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  6       /* 24C02 requires 5ms delay */
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x52    /* I2C boot EEPROM (24C02BN)    */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* Bytes of address             */
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS      3
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  10
+
+/* I2C bootstrap EEPROM */
+#define CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR      0x52
+#define CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET    0
+#define CONFIG_4xx_CONFIG_BLOCKSIZE            16
 
 /* Standard DTT sensor configuration */
 #define CONFIG_DTT_DS1775      1
@@ -424,18 +432,30 @@
 /*
  * Commands additional to the ones defined in amcc-common.h
  */
+#define CONFIG_CMD_CHIP_CONFIG
 #define CONFIG_CMD_DATE
 #define CONFIG_CMD_LOG
 #define CONFIG_CMD_NAND
 #define CONFIG_CMD_PCI
 #define CONFIG_CMD_SNTP
 
+/*
+ * Don't run the memory POST on the NAND-booting version. It will
+ * overwrite part of the U-Boot image which is already loaded from NAND
+ * to SDRAM.
+ */
+#if defined(CONFIG_NAND_U_BOOT)
+#define CONFIG_SYS_POST_MEMORY_ON      0
+#else
+#define CONFIG_SYS_POST_MEMORY_ON      CONFIG_SYS_POST_MEMORY
+#endif
+
 /* POST support */
 #define CONFIG_POST            (CONFIG_SYS_POST_CACHE          | \
                                 CONFIG_SYS_POST_CPU            | \
                                 CONFIG_SYS_POST_ETHER          | \
                                 CONFIG_SYS_POST_I2C            | \
-                                CONFIG_SYS_POST_MEMORY | \
+                                CONFIG_SYS_POST_MEMORY_ON      | \
                                 CONFIG_SYS_POST_UART)
 
 /* Define here the base-addresses of the UARTs to test in POST */