*
* (C) Copyright 2004 Paul Reynolds <PaulReynolds@lhsolutions.com>
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
/************************************************************************
* High Level Configuration Options
*----------------------------------------------------------------------*/
#define CONFIG_KATMAI 1 /* Board is Katmai */
-#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_440SPE 1 /* Specifc SPe support */
#define CONFIG_440SPE_REVA 1 /* Support old Rev A. */
/*
* Enable this board for more than 2GB of SDRAM
*/
-#define CONFIG_PHYS_64BIT
#define CONFIG_VERY_BIG_RAM
/*
#define CONFIG_HOSTNAME katmai
#include "amcc-common.h"
-#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#undef CONFIG_SHOW_BOOT_PROGRESS
/*-----------------------------------------------------------------------
#define CONFIG_SYS_TEMP_STACK_OCM 1
#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE
#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
-#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */
-#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */
+#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
/*-----------------------------------------------------------------------
/*-----------------------------------------------------------------------
* I2C
*----------------------------------------------------------------------*/
-#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
-#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_SPD_BUS_NUM 0 /* The I2C bus for SPD */
#define IIC0_BOOTPROM_ADDR 0x50
#define IIC0_ALT_BOOTPROM_ADDR 0x54
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_I2C_EEPROM_ADDR (0x50)
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
#define CONFIG_SYS_M41T11_BASE_YEAR 1900 /* play along with linux */
-/* I2C DTT */
-#define CONFIG_DTT_ADM1021 1 /* ADM1021 temp sensor support */
-#define CONFIG_SYS_DTT_BUS_NUM 1 /* The I2C bus for DTT */
-/*
- * standard dtt sensor configuration - bottom bit will determine local or
- * remote sensor of the ADM1021, the rest determines index into
- * CONFIG_SYS_DTT_ADM1021 array below.
- */
-#define CONFIG_DTT_SENSORS { 0, 1 }
-
-/*
- * ADM1021 temp sensor configuration (see dtt/adm1021.c for details).
- * there will be one entry in this array for each two (dummy) sensors in
- * CONFIG_DTT_SENSORS.
- *
- * For Katmai board:
- * - only one ADM1021
- * - i2c addr 0x18
- * - conversion rate 0x02 = 0.25 conversions/second
- * - ALERT ouput disabled
- * - local temp sensor enabled, min set to 0 deg, max set to 85 deg
- * - remote temp sensor enabled, min set to 0 deg, max set to 85 deg
- */
-#define CONFIG_SYS_DTT_ADM1021 { { 0x18, 0x02, 0, 1, 0, 85, 1, 0, 58} }
-
/*-----------------------------------------------------------------------
* Environment
*----------------------------------------------------------------------*/
/*
* Commands additional to the ones defined in amcc-common.h
*/
-#define CONFIG_CMD_CHIP_CONFIG
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_ECCTEST
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
#define CONFIG_CMD_PCI
#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_SNTP
#define CONFIG_IBM_EMAC4_V4 1 /* 440SPe has this EMAC version */
#define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */
*-----------------------------------------------------------------------
*/
/* General PCI */
-#define CONFIG_PCI /* include pci support */
-#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */
+#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */
#define CONFIG_PCI_CONFIG_HOST_BRIDGE
#define CONFIG_SYSTEMACE 1 /* Enable SystemACE support */
#define CONFIG_SYS_SYSTEMACE_WIDTH 16 /* Data bus width is 16 */
#define CONFIG_SYS_SYSTEMACE_BASE CONFIG_SYS_ACE_BASE
-#define CONFIG_DOS_PARTITION 1
/*-----------------------------------------------------------------------
* External Bus Controller (EBC) Setup