/* SPL Loader Configuration */
#if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + SZ_4M)
#define CONFIG_SYS_UBOOT_BASE 0x50280000
/* Image load address in RAM for DFU boot*/
#else
#define CONFIG_SYS_UBOOT_BASE 0x50080000
-/*
- * Link BSS to be within SPL in a dedicated region located near the top of
- * the MCU SRAM, this way making it available also before relocation. Note
- * that we are not using the actual top of the MCU SRAM as there is a memory
- * location filled in by the boot ROM that we want to read out without any
- * interference from the C context.
- */
-#define CONFIG_SPL_BSS_START_ADDR (0x41c80000 -\
- CONFIG_SPL_BSS_MAX_SIZE)
-/* Set the stack right below the SPL BSS section */
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_BSS_START_ADDR
-/* Configure R5 SPL post-relocation malloc pool in DDR */
-#define CONFIG_SYS_SPL_MALLOC_START 0x84000000
-#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M
-/* Image load address in RAM for DFU boot*/
#endif
-#define CONFIG_SYS_BOOTM_LEN SZ_64M
-
/* U-Boot general configuration */
#define EXTRA_ENV_J721S2_BOARD_SETTINGS \
"default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
DFU_ALT_INFO_RAM \
DFU_ALT_INFO_OSPI
-#if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
-#define EXTRA_ENV_J721S2_BOARD_SETTINGS_MTD \
- "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
- "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
-#else
-#define EXTRA_ENV_J721S2_BOARD_SETTINGS_MTD
-#endif
-
/* Incorporate settings into the U-Boot environment */
#define CONFIG_EXTRA_ENV_SETTINGS \
DEFAULT_LINUX_BOOT_ENV \
EXTRA_ENV_RPROC_SETTINGS \
EXTRA_ENV_DFUARGS \
DEFAULT_UFS_TI_ARGS \
- EXTRA_ENV_J721S2_BOARD_SETTINGS_MTD \
EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY
/* Now for the remaining common defines */