Convert CONFIG_SYS_SPL_MALLOC_SIZE et al to Kconfig

[platform/kernel/u-boot.git] / include / configs / j721e_evm.h

diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h
index 8ebdb7c..a814961 100644 (file)
--- a/include/configs/j721e_evm.h
+++ b/include/configs/j721e_evm.h
@@ -20,26 +20,10 @@
 
 /* SPL Loader Configuration */
 #if defined(CONFIG_TARGET_J721E_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
-#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SPL_TEXT_BASE + SZ_4M)
 #define CONFIG_SYS_UBOOT_BASE          0x50280000
 /* Image load address in RAM for DFU boot*/
 #else
 #define CONFIG_SYS_UBOOT_BASE          0x50080000
-/*
- * Link BSS to be within SPL in a dedicated region located near the top of
- * the MCU SRAM, this way making it available also before relocation. Note
- * that we are not using the actual top of the MCU SRAM as there is a memory
- * location filled in by the boot ROM that we want to read out without any
- * interference from the C context.
- */
-#define CONFIG_SPL_BSS_START_ADDR      (CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX -\
-                                        CONFIG_SPL_BSS_MAX_SIZE)
-/* Set the stack right below the SPL BSS section */
-#define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SPL_BSS_START_ADDR
-/* Configure R5 SPL post-relocation malloc pool in DDR */
-#define CONFIG_SYS_SPL_MALLOC_START    0x84000000
-#define CONFIG_SYS_SPL_MALLOC_SIZE     SZ_16M
-/* Image load address in RAM for DFU boot*/
 #endif
 
 #define CONFIG_SYS_BOOTM_LEN           SZ_64M