/* DDR Configuration */
#define CONFIG_SYS_SDRAM_BASE1 0x880000000
+/* FLASH Configuration */
+#define CONFIG_SYS_FLASH_BASE 0x000000000
/* SPL Loader Configuration */
#if defined(CONFIG_TARGET_J721E_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
/* Image load address in RAM for DFU boot*/
#else
#define CONFIG_SYS_UBOOT_BASE 0x50080000
-/* Set the stack right below the SPL BSS section */
-/* Configure R5 SPL post-relocation malloc pool in DDR */
-#define CONFIG_SYS_SPL_MALLOC_START 0x84000000
-#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M
-/* Image load address in RAM for DFU boot*/
#endif
-#define CONFIG_SYS_BOOTM_LEN SZ_64M
-
/* HyperFlash related configuration */
/* U-Boot general configuration */
DFU_ALT_INFO_RAM \
DFU_ALT_INFO_OSPI
-#if defined(CONFIG_TARGET_J721E_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
-#define EXTRA_ENV_J721E_BOARD_SETTINGS_MTD \
- "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
- "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
-#else
-#define EXTRA_ENV_J721E_BOARD_SETTINGS_MTD
-#endif
-
#if CONFIG_IS_ENABLED(CMD_PXE)
# define BOOT_TARGET_PXE(func) func(PXE, pxe, na)
#else
EXTRA_ENV_RPROC_SETTINGS \
EXTRA_ENV_DFUARGS \
DEFAULT_UFS_TI_ARGS \
- EXTRA_ENV_J721E_BOARD_SETTINGS_MTD \
EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY \
BOOTENV