Convert CONFIG_SPL_BSS_MAX_SIZE et al to Kconfig

[platform/kernel/u-boot.git] / include / configs / j721e_evm.h

diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h
index 5aaa31e..8ebdb7c 100644 (file)
--- a/include/configs/j721e_evm.h
+++ b/include/configs/j721e_evm.h
@@ -20,20 +20,12 @@
 
 /* SPL Loader Configuration */
 #if defined(CONFIG_TARGET_J721E_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
-#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SPL_TEXT_BASE +        \
-                                        CONFIG_SYS_K3_NON_SECURE_MSRAM_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SPL_TEXT_BASE + SZ_4M)
 #define CONFIG_SYS_UBOOT_BASE          0x50280000
 /* Image load address in RAM for DFU boot*/
 #else
 #define CONFIG_SYS_UBOOT_BASE          0x50080000
 /*
- * Maximum size in memory allocated to the SPL BSS. Keep it as tight as
- * possible (to allow the build to go through), as this directly affects
- * our memory footprint. The less we use for BSS the more we have available
- * for everything else.
- */
-#define CONFIG_SPL_BSS_MAX_SIZE                0xA000
-/*
  * Link BSS to be within SPL in a dedicated region located near the top of
  * the MCU SRAM, this way making it available also before relocation. Note
  * that we are not using the actual top of the MCU SRAM as there is a memory
@@ -50,14 +42,7 @@
 /* Image load address in RAM for DFU boot*/
 #endif
 
-#ifdef CONFIG_SYS_K3_SPL_ATF
-#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME        "tispl.bin"
-#endif
-
-#define CONFIG_SPL_MAX_SIZE            CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
-
 #define CONFIG_SYS_BOOTM_LEN           SZ_64M
-#define CONFIG_CQSPI_REF_CLK           133333333
 
 /* HyperFlash related configuration */