/*
* Size of malloc() pool
*/
-#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+#define CFG_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
/*
/*
* NS16550 Configuration
*/
-#define CFG_PL011_SERIAL
+#define CONFIG_PL011_SERIAL
#define CONFIG_PL011_CLOCK 14745600
#define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1 }
#define CONFIG_CONS_INDEX 0
*/
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
+#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
#define CFG_FLASH_BASE 0x24000000
-#define CFG_MAX_FLASH_SECT 64
+#define CFG_MAX_FLASH_SECT 64
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define PHYS_FLASH_SIZE 0x01000000 /* 16MB */
+#define PHYS_FLASH_SIZE 0x01000000 /* 16MB */
#define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
#define CFG_MONITOR_LEN 0x00100000
-#define CFG_ENV_IS_IN_FLASH (1)
+#define CONFIG_ENV_IS_IN_FLASH 1
/*
* Move up the U-Boot & monitor area if more flash is fitted.
* If this U-Boot is to be run on Integrators with varying flash sizes,
- * drivers/cfi_flash.c::flash_init() can read the Integrator CP_FLASHPROG
- * register and dynamically assign CFG_ENV_ADDR & CFG_MONITOR_BASE
+ * drivers/mtd/cfi_flash.c::flash_init() can read the Integrator CP_FLASHPROG
+ * register and dynamically assign CONFIG_ENV_ADDR & CFG_MONITOR_BASE
* - CFG_MONITOR_BASE is set to indicate that the environment is not
* embedded in the boot monitor(s) area
*/
#if ( PHYS_FLASH_SIZE == 0x04000000 )
-#define CFG_ENV_ADDR 0x27F00000
+#define CONFIG_ENV_ADDR 0x27F00000
#define CFG_MONITOR_BASE 0x27F40000
#elif (PHYS_FLASH_SIZE == 0x02000000 )
-#define CFG_ENV_ADDR 0x25F00000
+#define CONFIG_ENV_ADDR 0x25F00000
#define CFG_MONITOR_BASE 0x25F40000
#else
-#define CFG_ENV_ADDR 0x24F00000
+#define CONFIG_ENV_ADDR 0x24F00000
#define CFG_MONITOR_BASE 0x27F40000
#endif
-#define CFG_ENV_SECT_SIZE 0x40000 /* 256KB */
-#define CFG_ENV_SIZE 8192 /* 8KB */
+#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */
+#define CONFIG_ENV_SIZE 8192 /* 8KB */
/*-----------------------------------------------------------------------
* CP control registers
*/