Merge branch 'master' of git://git.denx.de/u-boot-arm
[platform/kernel/u-boot.git] / include / configs / innokom.h
index 895998a..744d65c 100644 (file)
 
 #undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff      */
                                        /* for timer/console/ethernet       */
+
+#define        CONFIG_SYS_TEXT_BASE    0x0
+
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
 /*
  * Hardware drivers
  */
@@ -46,6 +52,7 @@
 /*
  * select serial console configuration
  */
+#define CONFIG_PXA_SERIAL
 #define CONFIG_FFUART          1       /* we use FFUART on CSB226 */
 
 /* allow to overwrite serial and ethaddr */
  * Size of malloc() pool
  */
 #define CONFIG_SYS_MALLOC_LEN          (256*1024)
-#define CONFIG_SYS_GBL_DATA_SIZE       128             /* size in bytes reserved for initial data */
 
 #define CONFIG_SYS_LONGHELP                            /* undef to save memory         */
 #define CONFIG_SYS_PROMPT              "uboot> "       /* Monitor Command Prompt       */
 /*
  * I2C bus
  */
+#define CONFIG_I2C_MV                  1
+#define CONFIG_MV_I2C_REG              0x40301680
 #define CONFIG_HARD_I2C                        1
 #define CONFIG_SYS_I2C_SPEED                   50000
 #define CONFIG_SYS_I2C_SLAVE                   0xfe
 /*
  * SMSC91C111 Network Card
  */
-#define CONFIG_DRIVER_SMC91111         1
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111                1
 #define CONFIG_SMC91111_BASE           0x14000000 /* chip select 5         */
 #undef  CONFIG_SMC_USE_32_BIT                     /* 16 bit bus access     */
 #undef  CONFIG_SMC_91111_EXT_PHY                  /* we use internal phy   */
 
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
  * JFFS2 partitions
  *
  */
 #define CONFIG_SYS_PSSR_VAL            0x37
 
+#define        CONFIG_SYS_CCCR                 CCCR_L27|CCCR_M2|CCCR_N10
+#define        CONFIG_SYS_CKEN                 0x0
+
 /*
  * Memory settings
  *
 #define CONFIG_SYS_MCIO0_VAL           0x00000000
 #define CONFIG_SYS_MCIO1_VAL           0x00000000
 
+#define        CONFIG_SYS_FLYCNFG_VAL          0x00000000
+#define        CONFIG_SYS_SXCNFG_VAL           0x00000000
+
 /*
 #define CSB226_USER_LED0       0x00000008
 #define CSB226_USER_LED1       0x00000010