global: Convert CONFIG_LOADADDR to CONFIG_SYS_LOADADDR
[platform/kernel/u-boot.git] / include / configs / imx8qxp_mek.h
index 0aaca33..bab8021 100644 (file)
@@ -7,6 +7,7 @@
 #define __IMX8QXP_MEK_H
 
 #include <linux/sizes.h>
+#include <linux/stringify.h>
 #include <asm/arch/imx-regs.h>
 
 #ifdef CONFIG_SPL_BUILD
@@ -14,7 +15,6 @@
 #define CONFIG_SYS_MONITOR_LEN                         (1024 * 1024)
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR                0x800
-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION             0
 
 #define CONFIG_SPL_LDSCRIPT            "arch/arm/cpu/armv8/u-boot-spl.lds"
 #define CONFIG_SPL_STACK               0x013E000
 
 #define CONFIG_REMAKE_ELF
 
-#define CONFIG_BOARD_EARLY_INIT_F
-
 /* Flat Device Tree Definitions */
 #define CONFIG_OF_BOARD_SETUP
 
-#undef CONFIG_CMD_EXPORTENV
-#undef CONFIG_CMD_IMPORTENV
-#undef CONFIG_CMD_IMLS
-
-#undef CONFIG_CMD_CRC32
-
 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 #define USDHC1_BASE_ADDR                0x5B010000
 #define USDHC2_BASE_ADDR                0x5B020000
 
-#define CONFIG_ENV_OVERWRITE
-
 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 
 #ifdef CONFIG_AHAB_BOOT
@@ -69,7 +59,7 @@
        "fdt_addr=0x83000000\0"                 \
        "fdt_high=0xffffffffffffffff\0"         \
        "boot_fdt=try\0" \
-       "fdt_file=imx8qxp-mek.dtb\0" \
+       "fdt_file=undefined\0" \
        "initrd_addr=0x83800000\0"              \
        "initrd_high=0xffffffffffffffff\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
           "else booti ${loadaddr} - ${fdt_addr}; fi"
 
 /* Link Definitions */
-#define CONFIG_LOADADDR                        0x80280000
-
-#define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
+#define CONFIG_SYS_LOAD_ADDR                   0x80280000
 
 #define CONFIG_SYS_INIT_SP_ADDR         0x80200000
 
 /* Default environment is in SD */
-#define CONFIG_SYS_MMC_ENV_PART                0       /* user area */
 
 #define CONFIG_SYS_MMC_IMG_LOAD_PART   1
 
 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
-#define CONFIG_SYS_MMC_ENV_DEV         1   /* USDHC2 */
 #define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 
 /* LPDDR4 board total DDR is 3GB */
 #define PHYS_SDRAM_2_SIZE              0x40000000      /* 1 GB */
 
-/* Serial */
-#define CONFIG_BAUDRATE                        115200
-
 /* Generic Timer Definitions */
 #define COUNTER_FREQUENCY              8000000 /* 8MHz */
 
 #ifndef CONFIG_DM_PCA953X
 #define CONFIG_PCA953X
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
 #endif
 
 /* Networking */
 #define CONFIG_FEC_XCV_TYPE            RGMII
-#define FEC_QUIRK_ENET_MAC
 
 /* Misc configuration */
 #define CONFIG_SYS_CBSIZE      2048