global: Migrate CONFIG_STACKBASE to CFG
[platform/kernel/u-boot.git] / include / configs / imx8qxp_mek.h
index b1c51e7..4f55ae4 100644 (file)
 #include <asm/arch/imx-regs.h>
 
 #ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_MAX_SIZE                            (124 * 1024)
-#define CONFIG_SYS_MONITOR_LEN                         (1024 * 1024)
-
-#define CONFIG_SPL_STACK               0x013E000
-#define CONFIG_SPL_BSS_START_ADDR      0x00128000
-#define CONFIG_SPL_BSS_MAX_SIZE                0x1000  /* 4 KB */
-#define CONFIG_SYS_SPL_MALLOC_START    0x00120000
-#define CONFIG_SYS_SPL_MALLOC_SIZE     0x3000  /* 12 KB */
 #define CONFIG_SERIAL_LPUART_BASE      0x5a060000
-#define CONFIG_MALLOC_F_ADDR           0x00120000
-
-#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
+#define CFG_MALLOC_F_ADDR              0x00120000
 
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 #endif
 
-#define CONFIG_SYS_FSL_ESDHC_ADDR       0
-#define USDHC1_BASE_ADDR                0x5B010000
-#define USDHC2_BASE_ADDR                0x5B020000
-
 #ifdef CONFIG_AHAB_BOOT
 #define AHAB_ENV "sec_boot=yes\0"
 #else
@@ -38,7 +23,7 @@
 #endif
 
 /* Initial environment variables */
-#define CONFIG_EXTRA_ENV_SETTINGS              \
+#define CFG_EXTRA_ENV_SETTINGS         \
        AHAB_ENV \
        "script=boot.scr\0" \
        "image=Image\0" \
@@ -52,7 +37,7 @@
        "initrd_high=0xffffffffffffffff\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot}\0 " \
        "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 
 /* Link Definitions */
 
-#define CONFIG_SYS_INIT_SP_ADDR         0x80200000
-
 /* Default environment is in SD */
 
 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
-#define CONFIG_SYS_FSL_USDHC_NUM       2
 
-#define CONFIG_SYS_SDRAM_BASE          0x80000000
+#define CFG_SYS_SDRAM_BASE             0x80000000
 #define PHYS_SDRAM_1                   0x80000000
 #define PHYS_SDRAM_2                   0x880000000
 #define PHYS_SDRAM_1_SIZE              0x80000000      /* 2 GB */
 /* LPDDR4 board total DDR is 3GB */
 #define PHYS_SDRAM_2_SIZE              0x40000000      /* 1 GB */
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              8000000 /* 8MHz */
-
-#ifndef CONFIG_DM_PCA953X
-#define CONFIG_PCA953X
-#endif
-
-/* Networking */
-#define CONFIG_FEC_XCV_TYPE            RGMII
-
 /* Misc configuration */
-#define CONFIG_SYS_CBSIZE      2048
-#define CONFIG_SYS_MAXARGS     64
-#define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE
 
 #endif /* __IMX8QXP_MEK_H */