Convert CONFIG_SYS_BOOTM_LEN to Kconfig

[platform/kernel/u-boot.git] / include / configs / imx8qm_rom7720.h

diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h
index 3dea00c..308f17f 100644 (file)
--- a/include/configs/imx8qm_rom7720.h
+++ b/include/configs/imx8qm_rom7720.h
@@ -9,11 +9,6 @@
 #include <linux/sizes.h>
 #include <linux/stringify.h>
 #include <asm/arch/imx-regs.h>
-#define CONFIG_REMAKE_ELF
-
-#define CONFIG_SPL_MAX_SIZE            (124 * 1024)
-#define CONFIG_SPL_BSS_START_ADDR      0x00128000
-#define CONFIG_SPL_BSS_MAX_SIZE        0x1000  /* 4 KB */
 
 #define CONFIG_SYS_BOOTMAPSZ           (256 << 20)
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
@@ -59,13 +54,13 @@
        "image=Image\0" \
        "panel=NULL\0" \
        "console=ttyLP0\0" \
-       "fdt_addr=0x83000000\0"                 \
+       "fdt_addr=0x84000000\0"                 \
        "boot_fdt=try\0" \
        "fdt_file=imx8qm-rom7720-a1.dtb\0" \
        "initrd_addr=0x83800000\0"              \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
-       "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcpart=1\0" \
+       "mmcroot=/dev/mmcblk2p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \
        "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
@@ -107,24 +102,10 @@
 
 /* Link Definitions */
 
-#define CONFIG_SYS_INIT_SP_ADDR                0x80200000
-
-/* Default environment is in SD */
-
-#ifdef CONFIG_QSPI_BOOT
-#define CONFIG_ENV_SPI_BUS     CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS      CONFIG_SF_DEFAULT_CS
-#define CONFIG_ENV_SPI_MODE    CONFIG_SF_DEFAULT_MODE
-#define CONFIG_ENV_SPI_MAX_HZ  CONFIG_SF_DEFAULT_SPEED
-#endif
-
-#define CONFIG_SYS_MMC_IMG_LOAD_PART   1
-
 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board,
  * USDHC3 is for SD on base board On DDR4 board, USDHC1 is mux for NAND,
  * USDHC2 is for SD, USDHC3 is for SD on base board
  */
-#define CONFIG_MMCROOT                 "/dev/mmcblk2p2"  /* USDHC3 */
 #define CONFIG_SYS_FSL_USDHC_NUM       3
 
 #define CONFIG_SYS_SDRAM_BASE          0x80000000
@@ -134,11 +115,5 @@
 /* LPDDR4 board total DDR is 6GB, DDR4 board total DDR is 4 GB */
 #define PHYS_SDRAM_2_SIZE              0x80000000      /* 2 GB */
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              8000000 /* 8MHz */
-
-/* Networking */
-#define CONFIG_FEC_XCV_TYPE            RGMII
-
 #include <linux/stringify.h>
 #endif /* __IMX8QM_ROM7720_H */