Convert CONFIG_OF_EMBED to Kconfig

[platform/kernel/u-boot.git] / include / configs / imx8qm_mek.h

diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h
index 1864374..d3c3e58 100644 (file)
--- a/include/configs/imx8qm_mek.h
+++ b/include/configs/imx8qm_mek.h
@@ -10,12 +10,13 @@
 #include <linux/stringify.h>
 #include <asm/arch/imx-regs.h>
 
+#define CONFIG_SYS_BOOTM_LEN           (64 * SZ_1M)
+
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SPL_MAX_SIZE                            (124 * 1024)
 #define CONFIG_SYS_MONITOR_LEN                         (1024 * 1024)
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR                0x800
-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION             0
 
 #define CONFIG_SPL_LDSCRIPT            "arch/arm/cpu/armv8/u-boot-spl.lds"
 #define CONFIG_SPL_STACK               0x013E000
@@ -29,8 +30,6 @@
 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
 
 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
-
-#define CONFIG_OF_EMBED
 #endif
 
 #define CONFIG_REMAKE_ELF
@@ -41,11 +40,6 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 #define USDHC1_BASE_ADDR                0x5B010000
 #define USDHC2_BASE_ADDR                0x5B020000
-#define CONFIG_SUPPORT_EMMC_BOOT       /* eMMC specific */
-
-#define CONFIG_ENV_OVERWRITE
-
-#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 
 #ifdef CONFIG_AHAB_BOOT
 #define AHAB_ENV "sec_boot=yes\0"
@@ -148,25 +142,17 @@
           "else booti ${loadaddr} - ${fdt_addr}; fi"
 
 /* Link Definitions */
-#define CONFIG_LOADADDR                        0x80280000
-
-#define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
 
 #define CONFIG_SYS_INIT_SP_ADDR         0x80200000
 
 /* Default environment is in SD */
-#define CONFIG_SYS_MMC_ENV_PART                0       /* user area */
 
 #define CONFIG_SYS_MMC_IMG_LOAD_PART   1
 
 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
-#define CONFIG_SYS_MMC_ENV_DEV         1   /* USDHC2 */
 #define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN          ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
-
 #define CONFIG_SYS_SDRAM_BASE          0x80000000
 #define PHYS_SDRAM_1                   0x80000000
 #define PHYS_SDRAM_2                   0x880000000
@@ -178,6 +164,5 @@
 
 /* Networking */
 #define CONFIG_FEC_XCV_TYPE            RGMII
-#define FEC_QUIRK_ENET_MAC
 
 #endif /* __IMX8QM_MEK_H */