Convert CONFIG_SYS_SPL_MALLOC_SIZE et al to Kconfig

[platform/kernel/u-boot.git] / include / configs / imx8mp_rsb3720.h

diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h
index cd8116f..efff6b9 100644 (file)
--- a/include/configs/imx8mp_rsb3720.h
+++ b/include/configs/imx8mp_rsb3720.h
@@ -14,7 +14,6 @@
 
 #define CONFIG_SYS_BOOTM_LEN           (32 * SZ_1M)
 
-#define CONFIG_SPL_MAX_SIZE            (152 * 1024)
 #define CONFIG_SYS_MONITOR_LEN         (512 * 1024)
 #define CONFIG_SYS_UBOOT_BASE  (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
@@ -28,12 +27,6 @@
                 0x5f, 0xd3, 0x6b, 0x9b, 0xe5, 0xb9)
 
 #ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_STACK               0x960000
-#define CONFIG_SPL_BSS_START_ADDR      0x0098FC00
-#define CONFIG_SPL_BSS_MAX_SIZE                0x400   /* 1 KB */
-#define CONFIG_SYS_SPL_MALLOC_START    0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE     SZ_512K /* 512 KB */
-
 #define CONFIG_MALLOC_F_ADDR           0x184000 /* malloc f used before \
                                                  * GD_FLG_FULL_MALLOC_INIT \
                                                  * set \
@@ -149,10 +142,6 @@
 /* Link Definitions */
 #define CONFIG_SYS_INIT_RAM_ADDR       0x40000000
 #define CONFIG_SYS_INIT_RAM_SIZE       0x80000
-#define CONFIG_SYS_INIT_SP_OFFSET \
-       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
-       (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 
 /* Totally 6GB or 4G DDR */
@@ -168,14 +157,7 @@
 #define PHYS_SDRAM_2_SIZE              0x80000000      /* 2 GB */
 #endif
 
-#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(3)
-
-/* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE              2048
-#define CONFIG_SYS_MAXARGS             64
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE + \
-                                       sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_MXC_UART_BASE           UART3_BASE_ADDR
 
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0