Convert CONFIG_SPL_PAD_TO et al to Kconfig

[platform/kernel/u-boot.git] / include / configs / imx8mp_rsb3720.h

diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h
index b899775..e08f773 100644 (file)
--- a/include/configs/imx8mp_rsb3720.h
+++ b/include/configs/imx8mp_rsb3720.h
@@ -12,14 +12,20 @@
 #include <asm/arch/imx-regs.h>
 #include <config_distro_bootcmd.h>
 
-#define CONFIG_HAS_ETH1
-
 #define CONFIG_SYS_BOOTM_LEN           (32 * SZ_1M)
 
-#define CONFIG_SPL_MAX_SIZE            (152 * 1024)
 #define CONFIG_SYS_MONITOR_LEN         (512 * 1024)
 #define CONFIG_SYS_UBOOT_BASE  (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
+/* GUIDs for capsule updatable firmware images */
+#define IMX8MP_RSB3720A1_4G_FIT_IMAGE_GUID \
+       EFI_GUID(0xb1251e89, 0x384a, 0x4635, 0xa8, 0x06, \
+                0x3a, 0xa0, 0xb0, 0xe9, 0xf9, 0x65)
+
+#define IMX8MP_RSB3720A1_6G_FIT_IMAGE_GUID \
+       EFI_GUID(0xb5fb6f08, 0xe142, 0x4db1, 0x97, 0xea, \
+                0x5f, 0xd3, 0x6b, 0x9b, 0xe5, 0xb9)
+
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SPL_STACK               0x960000
 #define CONFIG_SPL_BSS_START_ADDR      0x0098FC00
@@ -43,11 +49,7 @@
 /* ENET Config */
 /* ENET1 */
 #if defined(CONFIG_CMD_NET)
-#define CONFIG_ETHPRIME                 "eth1" /* Set eqos to primary since we use its MDIO */
-
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          4
-#define FEC_QUIRK_ENET_MAC
 
 #define DWC_NET_PHYADDR                        4
 #ifdef CONFIG_DWC_ETH_QOS
@@ -100,7 +102,7 @@
        "bootm_size=0x10000000\0" \
        "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
        "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
@@ -151,7 +153,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 /* Totally 6GB or 4G DDR */
 #define CONFIG_SYS_SDRAM_BASE          0x40000000
@@ -168,13 +169,6 @@
 
 #define CONFIG_MXC_UART_BASE           UART3_BASE_ADDR
 
-/* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE              2048
-#define CONFIG_SYS_MAXARGS             64
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE + \
-                                       sizeof(CONFIG_SYS_PROMPT) + 16)
-
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0