Convert CONFIG_SPL_BSS_MAX_SIZE et al to Kconfig

[platform/kernel/u-boot.git] / include / configs / imx8mp_evk.h

diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h
index a6569d5..ab7bab4 100644 (file)
--- a/include/configs/imx8mp_evk.h
+++ b/include/configs/imx8mp_evk.h
@@ -12,46 +12,26 @@
 
 #define CONFIG_SYS_BOOTM_LEN           (32 * SZ_1M)
 
-#define CONFIG_SPL_MAX_SIZE            (152 * 1024)
 #define CONFIG_SYS_MONITOR_LEN         (512 * 1024)
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR        0x300
 #define CONFIG_SYS_UBOOT_BASE  (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
 #ifdef CONFIG_SPL_BUILD
 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
-#define CONFIG_SPL_LDSCRIPT            "arch/arm/cpu/armv8/u-boot-spl.lds"
 #define CONFIG_SPL_STACK               0x960000
 #define CONFIG_SPL_BSS_START_ADDR      0x0098FC00
-#define CONFIG_SPL_BSS_MAX_SIZE                0x400   /* 1 KB */
 #define CONFIG_SYS_SPL_MALLOC_START    0x42200000
 #define CONFIG_SYS_SPL_MALLOC_SIZE     SZ_512K /* 512 KB */
 
 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
-#undef CONFIG_DM_MMC
-#undef CONFIG_DM_PMIC
-#undef CONFIG_DM_PMIC_PFUZE100
-
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
 #define CONFIG_POWER_PCA9450
 
-#define CONFIG_SYS_I2C_LEGACY
-
 #endif
 
 #if defined(CONFIG_CMD_NET)
-#define CONFIG_ETHPRIME                 "eth1" /* Set eqos to primary since we use its MDIO */
-
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          1
-#define FEC_QUIRK_ENET_MAC
 
 #define DWC_NET_PHYADDR                        1
-#ifdef CONFIG_DWC_ETH_QOS
-#define CONFIG_SYS_NONCACHED_MEMORY     (1 * SZ_1M)     /* 1M */
-#endif
 
 #define PHY_ANEG_TIMEOUT 20000
 
@@ -68,8 +48,8 @@
 /* Initial environment variables */
 #define CONFIG_EXTRA_ENV_SETTINGS              \
        BOOTENV \
-       "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
-       "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+       "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+       "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
        "image=Image\0" \
        "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
        "fdt_addr_r=0x43000000\0"                       \
@@ -77,13 +57,10 @@
        "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
        "initrd_addr=0x43800000\0"              \
        "bootm_size=0x10000000\0" \
-       "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcpart=1\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
 
 /* Link Definitions */
-#define CONFIG_LOADADDR                        0x40480000
-
-#define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
 
 #define CONFIG_SYS_INIT_RAM_ADDR       0x40000000
 #define CONFIG_SYS_INIT_RAM_SIZE       0x80000
@@ -92,10 +69,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN          SZ_32M
 
 /* Totally 6GB DDR */
 #define CONFIG_SYS_SDRAM_BASE          0x40000000
@@ -104,22 +77,6 @@
 #define PHYS_SDRAM_2                   0x100000000
 #define PHYS_SDRAM_2_SIZE              0xC0000000      /* 3 GB */
 
-#define CONFIG_MXC_UART_BASE           UART2_BASE_ADDR
-
-/* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE              2048
-#define CONFIG_SYS_MAXARGS             64
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE + \
-                                       sizeof(CONFIG_SYS_PROMPT) + 16)
-
-#define CONFIG_FSL_USDHC
-
-#define CONFIG_SYS_FSL_USDHC_NUM       2
-#define CONFIG_SYS_FSL_ESDHC_ADDR      0
-
-#define CONFIG_SYS_MMC_IMG_LOAD_PART   1
-
-#define CONFIG_SYS_I2C_SPEED           100000
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(2)
 
 #endif