Convert CONFIG_PCI_GT64120 to Kconfig

[platform/kernel/u-boot.git] / include / configs / imx8mn_beacon.h

diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h
index 7fed9a3..6faecbd 100644 (file)
--- a/include/configs/imx8mn_beacon.h
+++ b/include/configs/imx8mn_beacon.h
@@ -9,23 +9,15 @@
 #include <linux/sizes.h>
 #include <asm/arch/imx-regs.h>
 
-#define CONFIG_SPL_MAX_SIZE            (148 * SZ_1K)
 #define CONFIG_SYS_MONITOR_LEN SZ_512K
 #define CONFIG_SYS_UBOOT_BASE  \
        (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
 #ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_STACK               0x187FF0
-#define CONFIG_SPL_BSS_START_ADDR      0x0095e000
-#define CONFIG_SPL_BSS_MAX_SIZE        SZ_8K
-#define CONFIG_SYS_SPL_MALLOC_START    0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE     SZ_512K
-
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR           0x184000
 
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif /* CONFIG_SPL_BUILD */
 
@@ -94,10 +86,6 @@
 
 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
 #define CONFIG_SYS_INIT_RAM_SIZE        0x200000
-#define CONFIG_SYS_INIT_SP_OFFSET \
-       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
-       (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 #define CONFIG_SYS_SDRAM_BASE          0x40000000
 #define PHYS_SDRAM                     0x40000000
@@ -107,24 +95,4 @@
 #define PHYS_SDRAM_SIZE                0x40000000 /* 1GB DDR */
 #endif
 
-#define CONFIG_MXC_UART_BASE           UART2_BASE_ADDR
-
-/* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE              2048
-#define CONFIG_SYS_MAXARGS             64
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE + \
-                                       sizeof(CONFIG_SYS_PROMPT) + 16)
-
-/* USDHC */
-#define CONFIG_SYS_FSL_USDHC_NUM       2
-#define CONFIG_SYS_FSL_ESDHC_ADDR      0
-
-/* ENET Config */
-#if defined(CONFIG_FEC_MXC)
-#define CONFIG_FEC_MXC_PHYADDR 0
-#define FEC_QUIRK_ENET_MAC
-#define IMX_FEC_BASE                   0x30BE0000
-#endif /* CONFIG_FEC_MXC */
-
 #endif