(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
#ifdef CONFIG_SPL_BUILD
-# define CONFIG_SPL_BSS_START_ADDR 0x910000
-# define CONFIG_SYS_SPL_MALLOC_START 0x42200000
-# define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K
-
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
# define CONFIG_MALLOC_F_ADDR 0x930000
/* For RAW image gives a error info not panic */
-# define CONFIG_SPL_ABORT_ON_RAW_IMAGE
#endif /* CONFIG_SPL_BUILD */
#ifndef CONFIG_SPL_BUILD
#define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */
#define CONFIG_SYS_BOOTM_LEN SZ_256M
-/* UART */
-#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
-
/* USDHC */
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0