global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespace
[platform/kernel/u-boot.git] / include / configs / imx8mm-cl-iot-gate.h
index c994d71..917d567 100644 (file)
 #include <asm/arch/imx-regs.h>
 #include <config_distro_bootcmd.h>
 
-#define CONFIG_SYS_BOOTM_LEN           (32 * SZ_1M)
-#define CONFIG_SPL_MAX_SIZE            (148 * 1024)
-#define CONFIG_SYS_MONITOR_LEN         SZ_512K
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR        0x300
 #define CONFIG_SYS_UBOOT_BASE  \
        (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
 #ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_STACK               0x920000
-#define CONFIG_SPL_BSS_START_ADDR      0x910000
-#define CONFIG_SPL_BSS_MAX_SIZE                SZ_8K   /* 8 KB */
-#define CONFIG_SYS_SPL_MALLOC_START    0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE     SZ_512K /* 512 KB */
-
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR           0x912000
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 
 #endif
 
+/* GUIDs for capsule updatable firmware images */
+#define IMX8MM_CL_IOT_GATE_FIT_IMAGE_GUID \
+       EFI_GUID(0x7a32a939, 0xab92, 0x467b, 0x91, 0x52, \
+                0x74, 0x77, 0x1b, 0x95, 0xe6, 0x46)
+
+#define IMX8MM_CL_IOT_GATE_OPTEE_FIT_IMAGE_GUID \
+       EFI_GUID(0x0bf1165c, 0x1831, 0x4864, 0x94, 0x5e, \
+                0xac, 0x3d, 0x38, 0x48, 0xf4, 0x99)
+
 #if CONFIG_IS_ENABLED(CMD_MMC)
 # define BOOT_TARGET_MMC(func) \
        func(MMC, mmc, 2)      \
        "fdt_addr=0x43000000\0"                 \
        "fdt_addr_r=0x43000000\0" \
        "boot_fit=no\0" \
-       "dfu_alt_info=mmc 2=flash-bin raw 0x42 0x250 mmcpart 1;" \
-               "u-boot-itb raw 0x300 0x1B00 mmcpart 1\0"        \
+       "dfu_alt_info=mmc 2=flash-bin raw 0x42 0x1D00 mmcpart 1\0" \
        "fdt_file=sb-iotgimx8.dtb\0" \
        "fdtfile=sb-iotgimx8.dtb\0" \
        "initrd_addr=0x43800000\0"              \
        "bootm_size=0x10000000\0" \
        "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
-       "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcpart=1\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
        "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
                        "fi; " \
                "fi;\0"
 
-#ifndef CONFIG_BOOTCOMMAND
-#define CONFIG_BOOTCOMMAND \
-          "mmc dev ${mmcdev}; if mmc rescan; then " \
-                  "if run loadbootscript; then " \
-                          "run bootscript; " \
-                  "else " \
-                          "if run loadimage; then " \
-                                  "run mmcboot; " \
-                          "else run netboot; " \
-                          "fi; " \
-                  "fi; " \
-          "fi;"
-#endif
-
 /* Link Definitions */
-#define CONFIG_SYS_LOAD_ADDR                   0x40480000
 
 #define CONFIG_SYS_INIT_RAM_ADDR       0x40000000
 #define CONFIG_SYS_INIT_RAM_SIZE       0x80000
-#define CONFIG_SYS_INIT_SP_OFFSET \
-       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
-       (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN          SZ_32M
 
 #define CONFIG_SYS_SDRAM_BASE          0x40000000
 #define PHYS_SDRAM                     0x40000000
 #define PHYS_SDRAM_SIZE                        0x80000000 /* 2GB DDR */
 
-#define CONFIG_MXC_UART_BASE           UART3_BASE_ADDR
-
-/* Monitor Command Prompt */
-#define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
-#define CONFIG_SYS_CBSIZE              2048
-#define CONFIG_SYS_MAXARGS             64
-#define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE + \
-                                       sizeof(CONFIG_SYS_PROMPT) + 16)
-
 /* USDHC */
-#define CONFIG_FSL_USDHC
-
-#define CONFIG_SYS_FSL_USDHC_NUM       2
-#define CONFIG_SYS_FSL_ESDHC_ADDR      0
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART   1
+#define CFG_SYS_FSL_USDHC_NUM  2
+#define CFG_SYS_FSL_ESDHC_ADDR 0
 
-#define CONFIG_ETHPRIME                        "FEC"
-
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_FEC_MXC_PHYADDR         0
-#define FEC_QUIRK_ENET_MAC
-
-#define IMX_FEC_BASE                   0x30BE0000
 
 /* USB Configs */
-#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
 
 #endif /*__IMX8MM_CL_IOT_GATE_H*/