#define CONFIG_MX27
#define CONFIG_MX27_CLK32 32768 /* OSC32K frequency */
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-
/*
* Lowlevel configuration
*/
/*
* Memory Info
*/
-/* malloc() len */
-#define CONFIG_SYS_MALLOC_LEN (0x10000 + 512 * 1024)
/* memtest start address */
#define PHYS_SDRAM_1 0xA0000000 /* DDR Start */
#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
*/
/* Use buffered writes (~10x faster) */
/* Use hardware sector protection */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
/* CS2 Base address */
#define PHYS_FLASH_1 0xc0000000
/* Flash Base for U-Boot */
/*
* Ethernet
*/
-#define CONFIG_FEC_MXC
#define CONFIG_FEC_MXC_PHYADDR 0x1f
/*
#define CONFIG_MXC_NAND_REGS_BASE 0xd8000000
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0xd8000000
-#define CONFIG_JFFS2_NAND
#define CONFIG_MXC_NAND_HWECC
/*