#define __CONFIG_H
/*
- * If we are developing, we might want to start armboot from ram
- * so we MUST NOT initialize critical regs like mem-timing ...
- */
-#define CONFIG_INIT_CRITICAL /* undef for developing */
-
-/*
* High Level Configuration Options
* (easy to change)
*/
#define CONFIG_ARM7 1 /* This is a ARM7 CPU */
#define CONFIG_IMPA7 1 /* on an impA7 Board */
#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
-#define CONFIG_ARM7_REVD 1 /* enable ARM720 REV.D Workarounds */
+#define CONFIG_ARM7_REVD 1 /* enable ARM720 REV.D Workarounds */
#undef CONFIG_USE_IRQ /* don't need them anymore */
/*
* Size of malloc() pool
*/
-#define CONFIG_MALLOC_SIZE (CFG_ENV_SIZE + 128*1024)
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
/*
* Hardware drivers
*/
-#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
-#define CS8900_BASE 0x20000000
-#define CS8900_BUS32 1
+#define CONFIG_NET_MULTI
+#define CONFIG_CS8900 /* we have a CS8900 on-board */
+#define CONFIG_CS8900_BASE 0x20000000
+#define CONFIG_CS8900_BUS32
/*
* select serial console configuration
*/
+#define CONFIG_CLPS7111_SERIAL
#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
/* allow to overwrite serial and ethaddr */
#define CONFIG_BAUDRATE 9600
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_JFFS2)
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_JFFS2
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
#define CONFIG_BOOTDELAY 3
-#define CONFIG_BOOTARGS "devfs=mount root=ramfs console=ttyS0,9600"
+#define CONFIG_BOOTARGS "devfs=mount root=ramfs console=ttyS0,9600"
/*#define CONFIG_ETHADDR 08:00:3e:26:0a:5a */
/*#define CONFIG_NETMASK 255.255.0.0 */
/*#define CONFIG_IPADDR 172.22.2.128 */
/*#define CONFIG_BOOTFILE "impa7" */
#define CONFIG_BOOTCOMMAND "bootp;bootm"
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
/*
* Miscellaneous configurable options
*/
-#define CFG_LONGHELP /* undef to save memory */
-#define CFG_PROMPT "impA7 # " /* Monitor Command Prompt */
-#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
-#define CFG_MAXARGS 16 /* max number of command args */
-#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
-
-#define CFG_MEMTEST_START 0xc0400000 /* memtest works on */
-#define CFG_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_PROMPT "impA7 # " /* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
+#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
-#define CFG_LOAD_ADDR 0xc1000000 /* default load address */
+#define CONFIG_SYS_LOAD_ADDR 0xc1000000 /* default load address */
-#define CFG_HZ 2000 /* decrementer freq: 2 kHz */
+#define CONFIG_SYS_HZ 2000 /* decrementer freq: 2 kHz */
/* valid baudrates */
-#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/*-----------------------------------------------------------------------
* Stack sizes
#define PHYS_FLASH_2 0x10000000 /* Flash Bank #2 */
#define PHYS_FLASH_SIZE 0x00800000 /* 16 MB */
-#define CFG_FLASH_BASE PHYS_FLASH_1
+#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
-#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
-#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
+#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
/* timeout values are in ticks */
-#define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
-#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
+#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
+#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
-#define CFG_ENV_IS_IN_FLASH 1
-#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */
-#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
+#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */
+#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
-/* Flash banks JFFS2 should use */
-#define CFG_JFFS2_FIRST_BANK 0
-#define CFG_JFFS2_FIRST_SECTOR 8
-#define CFG_JFFS2_NUM_BANKS 2
+/*
+ * JFFS2 partitions
+ *
+ */
+/* No command line, one static partition, whole device */
+#undef CONFIG_CMD_MTDPARTS
+#define CONFIG_JFFS2_DEV "nor0"
+#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
+#define CONFIG_JFFS2_PART_OFFSET 0x00020000
+
+/* mtdparts command line support */
+/*
+#define CONFIG_CMD_MTDPARTS
+#define MTDIDS_DEFAULT "nor0=impA7 NOR Flash Bank #0,nor1=impA7 NOR Flash Bank #1"
+#define MTDPARTS_DEFAULT "mtdparts=impA7 NOR Flash Bank #0:-(FileSystem1);impA7 NOR Flash Bank #1:-(FileSystem2)"
+*/
#endif /* __CONFIG_H */