Merge tag 'tpm-030822' of https://source.denx.de/u-boot/custodians/u-boot-tpm

[platform/kernel/u-boot.git] / include / configs / ids8313.h

diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h
index 356bf6c..e89b800 100644 (file)
--- a/include/configs/ids8313.h
+++ b/include/configs/ids8313.h
@@ -28,10 +28,6 @@
 #define CONFIG_SYS_INIT_RAM_LOCK
 #define CONFIG_SYS_INIT_RAM_ADDR       0xFD000000
 #define CONFIG_SYS_INIT_RAM_SIZE       0x1000  /* End of used area in DPRAM */
-#define CONFIG_SYS_GBL_DATA_SIZE       0x100
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE \
-                                        - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 /*
  * Internal Definitions
@@ -45,7 +41,7 @@
  * Manually set up DDR parameters,
  * as this board has not the SPD connected to I2C.
  */
-#define CONFIG_SYS_DDR_SIZE            256             /* MB */
+#define CONFIG_SYS_SDRAM_SIZE          0x10000000 /* 256 MiB */
 #define CONFIG_SYS_DDR_CONFIG          (CSCONFIG_EN |\
                                         0x00010000 |\
                                         CSCONFIG_ROW_BIT_13 |\
@@ -108,18 +104,11 @@
 /*
  * NOR FLASH setup
  */
-#define CONFIG_SYS_FLASH_CFI_WIDTH     FLASH_CFI_8BIT
 #define CONFIG_FLASH_SHOW_PROGRESS     50
 
 #define CONFIG_SYS_FLASH_BASE          0xFF800000
 #define CONFIG_SYS_FLASH_SIZE          8
 
-
-#define CONFIG_SYS_MAX_FLASH_SECT      128
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500
-
 /*
  * NAND FLASH setup
  */
@@ -134,17 +123,10 @@
 #define CONFIG_SYS_MRAM_BASE           0xE2000000
 #define CONFIG_SYS_MRAM_SIZE           0x20000 /* 128 Kb */
 
-#define CONFIG_SYS_OR_TIMING_MRAM
-
-
 /*
  * CPLD setup
  */
 #define CONFIG_SYS_CPLD_BASE           0xE3000000
-#define CONFIG_SYS_CPLD_SIZE           0x8000
-
-#define CONFIG_SYS_OR_TIMING_MRAM
-
 
 /*
  * HW-Watchdog
@@ -169,7 +151,6 @@
 
 #ifdef CONFIG_TSEC2
 #define CONFIG_TSEC2_NAME              "TSEC1"
-#define CONFIG_SYS_TSEC2_OFFSET        0x25000
 #define TSEC2_PHY_ADDR                 0x3
 #define TSEC2_FLAGS                    TSEC_GIGABIT
 #define TSEC2_PHYIDX                   0
@@ -187,7 +168,6 @@
 #define CONFIG_SYS_NS16550_COM2        (CONFIG_SYS_IMMR + 0x4600)
 #define CONFIG_SYS_NS16550_CLK         (get_bus_freq(0))
 
-#define CONFIG_HAS_FSL_DR_USB
 #define CONFIG_SYS_SCCR_USBDRCM        3
 
 /*
@@ -216,8 +196,6 @@
 /*
  * Miscellaneous configurable options
  */
-#define CONFIG_SYS_CBSIZE              1024
-#define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE
 
 #define CONFIG_LOADS_ECHO
 #undef CONFIG_SYS_LOADS_BAUD_CHANGE
@@ -252,8 +230,6 @@
                        "${netmask}:${hostname}:${netdev}:off "         \
                        "console=${console},${baudrate} ${othbootargs}\0" \
        "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
-       "mtdids=" CONFIG_MTDIDS_DEFAULT "\0"                                    \
-       "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"                                \
        "\0"
 
 /* UBI Support */