* (C) Copyright 2009-2010
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
/*
* High Level Configuration Options
*/
#define CONFIG_ICON 1 /* Board is icon */
-#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_440SPE 1 /* Specifc SPe support */
+
+#define CONFIG_SYS_TEXT_BASE 0xFFFA0000
+
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
#define CONFIG_SYS_4xx_RESET_TYPE 0x2 /* use chip reset on this board */
#define CONFIG_HOSTNAME icon
#include "amcc-common.h"
-#define CONFIG_BOARD_EARLY_INIT_F /* Call board_pre_init */
#define CONFIG_BOARD_EARLY_INIT_R /* Call board_early_init_r */
/*
#define CONFIG_SYS_TEMP_STACK_OCM 1
#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE
#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Init RAM */
-#define CONFIG_SYS_INIT_RAM_END 0x2000 /* end used area */
-#define CONFIG_SYS_GBL_DATA_SIZE 128 /* sizeof init data */
+#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* size of used area */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \
- CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
+ GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
/*
* Serial Port
/*
* I2C
*/
-#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
-#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_SPD_BUS_NUM 0 /* The I2C bus for SPD */
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
/*
* Video options
*/
-#define CONFIG_VIDEO
#ifdef CONFIG_VIDEO
#define CONFIG_VIDEO_SM501
#define CONFIG_VIDEO_SM501_32BPP
#define CONFIG_VIDEO_SM501_PCI
#define VIDEO_FB_LITTLE_ENDIAN
-#define CONFIG_CFB_CONSOLE
#define CONFIG_VIDEO_LOGO
-#define CONFIG_CONSOLE_EXTRA_INFO
-#define CONFIG_VGA_AS_SINGLE_DEVICE
-#define CONFIG_VIDEO_SW_CURSOR
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CFG_CONSOLE_IS_IN_ENV
/*
* Commands additional to the ones defined in amcc-common.h
*/
-#define CONFIG_CMD_CHIP_CONFIG
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
#define CONFIG_CMD_PCI
#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_SNTP
-#ifdef CONFIG_VIDEO
-#define CONFIG_CMD_BMP
-#endif
#define CONFIG_IBM_EMAC4_V4 /* 440SPe has this EMAC version */
#define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */
* PCI stuff
*/
/* General PCI */
-#define CONFIG_PCI /* include pci support */
-#define CONFIG_PCI_PNP /* do pci plug-and-play */
+#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#define CONFIG_PCI_CONFIG_HOST_BRIDGE
#define CONFIG_PCI_BOOTDELAY 1000 /* enable pci bootdelay variable*/
#define CONFIG_SYSTEMACE /* Enable SystemACE support */
#define CONFIG_SYS_SYSTEMACE_WIDTH 16 /* Data bus width is 16 */
#define CONFIG_SYS_SYSTEMACE_BASE CONFIG_SYS_ACE_BASE
-#define CONFIG_DOS_PARTITION
/*
* External Bus Controller (EBC) Setup