Merge tag 'u-boot-atmel-fixes-2019.10-a' of https://gitlab.denx.de/u-boot/custodians...
[platform/kernel/u-boot.git] / include / configs / hrcon.h
index 9cb5df4..8fb3211 100644 (file)
@@ -24,9 +24,7 @@
 /*
  * DDR Setup
  */
-#define CONFIG_SYS_DDR_BASE            0x00000000 /* DDR is system memory */
-#define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_BASE
-#define CONFIG_SYS_DDR_SDRAM_BASE      CONFIG_SYS_DDR_BASE
+#define CONFIG_SYS_SDRAM_BASE          0x00000000 /* DDR is system memory */
 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL  DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05
 #define CONFIG_SYS_DDRCDR_VALUE        (DDRCDR_EN \
                                | DDRCDR_PZ_LOZ \
        (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 
 /*
- * Local Bus Configuration & Clock Setup
- */
-#define CONFIG_SYS_LCRR_DBYP           LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV         LCRR_CLKDIV_2
-#define CONFIG_SYS_LBC_LBCR            0x00040000
-
-/*
  * FLASH on the Local Bus
  */
 #if 1
 #define CONFIG_SYS_FLASH_ERASE_TOUT    60000 /* Flash Erase Timeout (ms) */
 #define CONFIG_SYS_FLASH_WRITE_TOUT    500 /* Flash Write Timeout (ms) */
 
-/*
- * FPGA
- */
-#define CONFIG_SYS_FPGA0_BASE          0xE0600000
-#define CONFIG_SYS_FPGA0_SIZE          1 /* FPGA size is 1M */
-
-
-#define CONFIG_SYS_FPGA_BASE(k)                CONFIG_SYS_FPGA0_BASE
 #define CONFIG_SYS_FPGA_DONE(k)                0x0010
 
 #define CONFIG_SYS_FPGA_COUNT          1
@@ -420,8 +403,6 @@ void fpga_control_clear(unsigned int bus, int pin);
 #define CONFIG_ROOTPATH                "/opt/nfsroot"
 #define CONFIG_BOOTFILE                "uImage"
 
-#define CONFIG_PREBOOT         /* enable preboot variable */
-
 #define        CONFIG_EXTRA_ENV_SETTINGS                                       \
        "netdev=eth0\0"                                                 \
        "consoledev=ttyS1\0"                                            \