#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
#define CONFIG_BOARD_EARLY_INIT_R
/*
/* Partitions */
#define CONFIG_DOS_PARTITION
+
/*
- * Supported commands
+ * BOOTP options
*/
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP)
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DISPLAY
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_SNTP
+
#define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
- "nfsroot=$(serverip):$(rootpath)\0" \
+ "nfsroot=${serverip}:${rootpath}\0" \
"ramargs=setenv bootargs root=/dev/ram rw\0" \
- "addip=setenv bootargs $(bootargs) " \
- "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
- ":$(hostname):$(netdev):off panic=1\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
"flash_nfs=run nfsargs addip;" \
- "bootm $(kernel_addr)\0" \
- "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \
+ "bootm ${kernel_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"rootpath=/opt/eldk/ppc_82xx\0" \
""
#define CONFIG_BOOTCOMMAND "run net_nfs"
+#define CONFIG_MISC_INIT_R 1
+
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
/*
* I2C configuration
#define CFG_MBAR 0xF0000000
#define CFG_SDRAM_BASE 0x00000000
#define CFG_DEFAULT_MBAR 0x80000000
+#define CFG_DISPLAY_BASE 0x80600000
+#define CFG_STATUS1_BASE 0x80600200
+#define CFG_STATUS2_BASE 0x80600300
/* Settings for XLB = 132 MHz */
#define SDRAM_DDR 1
*/
#define CONFIG_MPC5xxx_FEC 1
#define CONFIG_PHY_ADDR 0x00
+#define CONFIG_MII 1 /* MII PHY management */
/*
* GPIO configuration
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/* Enable an alternate, more extensive memory test */
#define CFG_ALT_MEMTEST
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
/*
- * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
- * which is normally part of the default commands (CFV_CMD_DFL)
+ * Enable loopw command.
*/
#define CONFIG_LOOPW
/* Display H1, Status Inputs, EPLD @0x80600000 */
#define CFG_CS3_START 0x80600000
-#define CFG_CS3_SIZE 0x00000210
-#define CFG_CS3_CFG 0x9800
+#define CFG_CS3_SIZE 0x00100000
+#define CFG_CS3_CFG 0x00019800
#define CFG_CS_BURST 0x00000000
#define CFG_CS_DEADCYCLE 0x33333333
#define CONFIG_ATAPI 1
+#define CONFIG_VIDEO_SMI_LYNXEM
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_VIDEO_LOGO
+
+/*
+ * PCI Mapping:
+ * 0x40000000 - 0x4fffffff - PCI Memory
+ * 0x50000000 - 0x50ffffff - PCI IO Space
+ */
+#define CONFIG_PCI 1
+#define CONFIG_PCI_PNP 1
+#define CONFIG_PCI_SCAN_SHOW 1
+
+#define CONFIG_PCI_MEM_BUS 0x40000000
+#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
+#define CONFIG_PCI_MEM_SIZE 0x10000000
+
+#define CONFIG_PCI_IO_BUS 0x50000000
+#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
+#define CONFIG_PCI_IO_SIZE 0x01000000
+
+#define CFG_ISA_IO CONFIG_PCI_IO_BUS
+
+/*---------------------------------------------------------------------*/
+/* Display addresses */
+/*---------------------------------------------------------------------*/
+
+#define CFG_DISP_CHR_RAM (CFG_DISPLAY_BASE + 0x38)
+#define CFG_DISP_CWORD (CFG_DISPLAY_BASE + 0x30)
+
#endif /* __CONFIG_H */
projects / platform / kernel / u-boot.git / blobdiff