powerpc/corenet_ds: Move CONFIG_SYS_TEXT_BASE into corenet_ds.h

[platform/kernel/u-boot.git] / include / configs / hcu5.h

diff --git a/include/configs/hcu5.h b/include/configs/hcu5.h
index 6694f53..0c8fdf5 100644 (file)
--- a/include/configs/hcu5.h
+++ b/include/configs/hcu5.h
@@ -41,6 +41,8 @@
 #define CONFIG_4xx             1               /* ... PPC4xx family    */
 #define CONFIG_HOSTNAME                hcu5
 
+#define        CONFIG_SYS_TEXT_BASE    0xFFFB0000
+
 /*
  * Include common defines/options for all boards produced by Netstal Maschinen
  */
@@ -61,7 +63,7 @@
 #define CONFIG_SYS_BOOT_BASE_ADDR      0xfff00000
 #define CONFIG_SYS_SDRAM_BASE          0x00000000      /* _must_ be 0          */
 #define CONFIG_SYS_FLASH_BASE          0xfff80000      /* start of FLASH       */
-#define CONFIG_SYS_MONITOR_BASE        TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_OCM_BASE            0xe0010000      /* ocm                  */
 #define CONFIG_SYS_OCM_DATA_ADDR       CONFIG_SYS_OCM_BASE
 #define CONFIG_SYS_PCI_BASE            0xe0000000      /* Internal PCI regs    */
@@ -80,17 +82,15 @@
 /* 440EPx/440GRx have 16KB of internal SRAM, so no need for D-Cache    */
 #define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SYS_OCM_BASE     /* OCM                  */
 
-#define CONFIG_SYS_INIT_RAM_END        (4 << 10)
-#define CONFIG_SYS_GBL_DATA_SIZE       256             /* num bytes initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE       (4 << 10)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET      (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
 
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK            /* external serial clock */
 #define CONFIG_BAUDRATE                115200
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
 
 /*-----------------------------------------------------------------------
  * Environment
@@ -208,9 +208,8 @@
                                 CONFIG_SYS_POST_FPU       | \
                                 CONFIG_SYS_POST_ETHER     | \
                                 CONFIG_SYS_POST_SPR)
-#define CONFIG_SYS_POST_UART_TABLE     {UART0_BASE}
 
-#define CONFIG_SYS_POST_WORD_ADDR      (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
+#define CONFIG_SYS_POST_UART_TABLE     { CONFIG_SYS_NS16550_COM1 }
 #define CONFIG_SYS_POST_CACHE_ADDR     0x7fff0000 /* free virtual address      */
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */