+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013 Gateworks Corporation
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
/* SPL */
-#define CONFIG_SPL_BOARD_INIT
/* Location in NAND to read U-Boot from */
#define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * SZ_1M)
/* Falcon Mode */
-#define CONFIG_CMD_SPL
#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
-#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
/* Falcon Mode - NAND support: args@17MB kernel@18MB */
-#define CONFIG_CMD_SPL_NAND_OFS (17 * SZ_1M)
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS (18 * SZ_1M)
/* Falcon Mode - MMC support: args@1MB kernel@2MB */
#include "imx6_spl.h" /* common IMX6 SPL configuration */
#include "mx6_common.h"
-#define CONFIG_DISPLAY_BOARDINFO_LATE
#define CONFIG_MACH_TYPE 4520 /* Gateworks Ventana Platform */
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
/* Init Functions */
-#define CONFIG_MISC_INIT_R
/* Driver Model */
#ifndef CONFIG_SPL_BUILD
/* SPI */
#ifdef CONFIG_CMD_SF
- #define CONFIG_MXC_SPI
#define CONFIG_SPI_FLASH_MTD
- #define CONFIG_SPI_FLASH_BAR
- #define CONFIG_SF_DEFAULT_BUS 0
- #define CONFIG_SF_DEFAULT_CS 0
/* GPIO 3-19 (21248) */
- #define CONFIG_SF_DEFAULT_SPEED 30000000
- #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
#endif
#elif defined(CONFIG_SPL_NAND_SUPPORT)
/* Enable NAND support */
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NAND_TRIMFFS
#ifdef CONFIG_CMD_NAND
- #define CONFIG_NAND_MXS
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_ONFI_DETECTION
/* DMA stuff, needed for GPMI/MXS NAND support */
- #define CONFIG_APBH_DMA
- #define CONFIG_APBH_DMA_BURST
- #define CONFIG_APBH_DMA_BURST8
#endif
#endif /* CONFIG_SPI_FLASH */
/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-/* eMMC Configs */
-#define CONFIG_SUPPORT_EMMC_BOOT
-#define CONFIG_SUPPORT_EMMC_RPMB
-
-/* Filesystem support */
-#define CONFIG_CMD_UBIFS
-
/*
* SATA Configs
*/
-#define CONFIG_CMD_SATA
#ifdef CONFIG_CMD_SATA
- #define CONFIG_DWC_AHSATA
#define CONFIG_SYS_SATA_MAX_DEVICE 1
#define CONFIG_DWC_AHSATA_PORT_ID 0
#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
#define CONFIG_LBA48
- #define CONFIG_LIBATA
#endif
/*
* PCI express
*/
-#define CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCI_FIXUP_DEV
#define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c
/* Various command support */
-#define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */
-#define CONFIG_CMD_GSC
-#define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */
#define CONFIG_CMD_UNZIP /* gzwrite */
-#define CONFIG_RBTREE
/* Ethernet support */
#define CONFIG_FEC_MXC
-#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_ARP_TIMEOUT 200UL
/* USB Configs */
-#define CONFIG_USB_EHCI_MX6
-#define CONFIG_USB_HOST_ETHER
-#define CONFIG_USB_ETHER_ASIX
-#define CONFIG_USB_ETHER_SMSC95XX
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
#define CONFIG_USBD_HS
-#define CONFIG_USB_ETHER
-#define CONFIG_USB_ETH_CDC
#define CONFIG_NETCONSOLE
-#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
-
-/* USB Mass Storage Gadget */
-#define CONFIG_USB_FUNCTION_MASS_STORAGE
/* Framebuffer and LCD */
-#define CONFIG_VIDEO_IPUV3
#define CONFIG_VIDEO_LOGO
-#define CONFIG_IPUV3_CLK 260000000
-#define CONFIG_CMD_HDMIDETECT
#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_HWCONFIG
#define CONFIG_PREBOOT
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-
/* Memory configuration */
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x10010000
#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
/* Physical Memory Map */
-#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
/*
* MTD Command for mtdparts
*/
-#define CONFIG_LZO
-#define CONFIG_CMD_MTDPARTS
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-#ifdef CONFIG_SPI_FLASH
-#define MTDIDS_DEFAULT "nor0=nor"
-#define MTDPARTS_DEFAULT \
- "mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)"
-#else
-#define MTDIDS_DEFAULT "nand0=nand"
-#define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
-#endif
/* Persistent Environment Config */
-#ifdef CONFIG_SPI_FLASH
- #define CONFIG_ENV_IS_IN_SPI_FLASH
-#elif defined(CONFIG_SPL_NAND_SUPPORT)
- #define CONFIG_ENV_IS_IN_NAND
-#else
- #define CONFIG_ENV_IS_IN_MMC
-#endif
#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SYS_MMC_ENV_PART 1
#define CONFIG_ENV_OFFSET (512 * SZ_1K)
#define CONFIG_ENV_SECT_SIZE (64 * SZ_1K)
#define CONFIG_ENV_SIZE (8 * SZ_1K)
- #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
- #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
- #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
- #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
#endif
/* Environment */
"hwconfig=_UNKNOWN_\0" \
"video=\0" \
\
- "mtdparts=" MTDPARTS_DEFAULT "\0" \
- "mtdids=" MTDIDS_DEFAULT "\0" \
+ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
+ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
"disk=0\0" \
"part=1\0" \
\