/* input clock of PLL: 24MHz input clock */
#define CONFIG_SYS_CLK_FREQ 24000000
-#define CONFIG_TIMER_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define COUNTER_FREQUENCY CONFIG_SYS_CLK_FREQ
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
/* PWM */
#define CONFIG_PWM
-/* Command definition*/
-#define CONFIG_FAT_WRITE
-
/* Miscellaneous configurable options */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */