global: Convert CONFIG_LOADADDR to CONFIG_SYS_LOADADDR

[platform/kernel/u-boot.git] / include / configs / ethernut5.h

diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h
index 72a5d22..dc01de7 100644 (file)
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@@ -20,7 +20,6 @@
 #define CONFIG_MACH_TYPE MACH_TYPE_ETHERNUT5
 
 /* CPU information */
-#define CONFIG_ARCH_CPU_INIT
 
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_SLOW_CLOCK     32768   /* slow clock xtal */
@@ -33,30 +32,20 @@
                                GENERATED_GBL_DATA_SIZE)
 
 /* 128MB SDRAM in 1 bank */
-#define CONFIG_NR_DRAM_BANKS           1
 #define CONFIG_SYS_SDRAM_BASE          0x20000000
 #define CONFIG_SYS_SDRAM_SIZE          (128 << 20)
 #define CONFIG_SYS_LOAD_ADDR           CONFIG_SYS_SDRAM_BASE
-#define CONFIG_LOADADDR                        CONFIG_SYS_LOAD_ADDR
 #define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + (1 << 20))
-#define CONFIG_SYS_MEMTEST_START       CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END         (CONFIG_SYS_TEXT_BASE \
-                                       - CONFIG_SYS_MALLOC_LEN)
 
 /* 512kB on-chip NOR flash */
 # define CONFIG_SYS_MAX_FLASH_BANKS    1
 # define CONFIG_SYS_FLASH_BASE         0x00200000 /* AT91SAM9XE_FLASH_BASE */
 # define CONFIG_AT91_EFLASH
 # define CONFIG_SYS_MAX_FLASH_SECT     32
-# define CONFIG_SYS_FLASH_PROTECTION   /* First stage loader in sector 0 */
 # define CONFIG_EFLASH_PROTSECTORS     1
 
 
 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
-#define CONFIG_ENV_OFFSET      0x3DE000
-#define CONFIG_ENV_SIZE                (132 << 10)
-#define CONFIG_ENV_SECT_SIZE   CONFIG_ENV_SIZE
-#define CONFIG_ENV_SPI_MAX_HZ  15000000
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
@@ -72,7 +61,6 @@
 
 /* JFFS2 */
 #ifdef CONFIG_CMD_JFFS2
-#define CONFIG_JFFS2_CMDLINE
 #define CONFIG_JFFS2_NAND
 #endif
 
@@ -102,18 +90,12 @@
 
 /* RTC */
 #if defined(CONFIG_CMD_DATE) || defined(CONFIG_CMD_SNTP)
-#define CONFIG_RTC_PCF8563
 #define CONFIG_SYS_I2C_RTC_ADDR                0x51
 #endif
 
 /* I2C */
 #define CONFIG_SYS_MAX_I2C_BUS 1
 
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_SOFT                    /* I2C bit-banged */
-#define CONFIG_SYS_I2C_SOFT_SPEED      100000
-#define CONFIG_SYS_I2C_SOFT_SLAVE      0
-
 #define I2C_SOFT_DECLARATIONS
 
 #define GPIO_I2C_SCL           AT91_PIO_PORTA, 24