CFG_CMD_BSP | \
CFG_CMD_DCR | \
CFG_CMD_DHCP | \
+ CFG_CMD_DISPLAY | \
CFG_CMD_DOC | \
CFG_CMD_DTT | \
CFG_CMD_EEPROM | \
#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
#endif
+#ifdef CFG_EP8260_H2
+#define CFG_FLASH_ERASE_TOUT 240000 /* Timeout for Flash Erase (in ms) */
+#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
+#else
#define CFG_FLASH_ERASE_TOUT 8000 /* Timeout for Flash Erase (in ms) */
#define CFG_FLASH_WRITE_TOUT 1 /* Timeout for Flash Write (in ms) */
+#endif
#ifndef CFG_RAMBOOT
# define CFG_ENV_IS_IN_FLASH 1
* SCCR - System Clock Control 9-8
*-----------------------------------------------------------------------
*/
+#ifdef CFG_EP8260_H2
+#define CFG_SCCR (SCCR_DFBRG00)
+#else
#define CFG_SCCR (SCCR_DFBRG01)
+#endif
/*-----------------------------------------------------------------------
* RCCR - RISC Controller Configuration 13-7
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
+/*
+ * JFFS2 partitions
+ *
+ */
+/* No command line, one static partition, whole device */
+#undef CONFIG_JFFS2_CMDLINE
+#define CONFIG_JFFS2_DEV "nor0"
+#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
+#define CONFIG_JFFS2_PART_OFFSET 0x00000000
+
+/* mtdparts command line support */
+/* Note: fake mtd_id used, no linux mtd map file */
+/*
+#define CONFIG_JFFS2_CMDLINE
+#define MTDIDS_DEFAULT ""
+#define MTDPARTS_DEFAULT ""
+*/
+
#endif /* __CONFIG_H */